OPA2634 Datasheet, PDF (13/17 Pages) Burr-Brown (TI) – Dual, Wideband, Single-Supply OPERATIONAL AMPLIFIER

INVERTING AMPLIFIER OPERATION
Since the OPA2634 is a general-purpose, wideband voltage-
feedback op amp, all of the familiar op amp application
circuits are available to the designer. Figure 7 shows a
typical inverting configuration where the I/O impedances
and signal gain from Figure 1 are retained in an inverting
circuit configuration. Inverting operation is one of the more
common requirements and offers several performance ben-
efits. The inverting configuration shows improved slew rate
and distortion. It also biases the input at V_S/2 for the best
headroom. The output voltage can be independently moved
with bias-adjustment resistors connected to the inverting input.
+5V
0.1µF
2R_T
1.50kΩ
2R_T
1.50kΩ
+
0.1µF
6.8µF
1/2
OPA2634
R_O
50Ω
50Ω Load
50Ω
Source
0.1µF
R_G
374Ω
R_M
57.6Ω
R_F
750Ω
FIGURE 7. Gain of –2 Example Circuit.
In the inverting configuration, three key design consider-
ation must be noted. The first is that the gain resistor (R_G)
becomes part of the signal channel input impedance. If input
impedance matching is desired (which is beneficial when-
ever the signal is coupled through a cable, twisted pair, long
PC board trace, or other transmission line conductor), R_G
may be set equal to the required termination value and R_F
adjusted to give the desired gain. This is the simplest
approach and results in optimum bandwidth and noise per-
formance. However, at low inverting gains, the resultant
feedback resistor value can present a significant load to the
amplifier output. For an inverting gain of 2, setting R_G to
50Ω for input matching eliminates the need for R_M but
requires a 100Ω feedback resistor. This has the interesting
advantage of the noise gain becoming equal to 2 for a 50Ω
source impedance—the same as the non-inverting circuits
considered above. However, the amplifier output will now
see the 100Ω feedback resistor in parallel with the external
load. In general, the feedback resistor should be limited to
the 200Ω to 1.5kΩ range. In this case, it is preferable to
increase both the R_F and R_G values, as shown in Figure 7,
and then achieve the input matching impedance with a third
resistor (R_M) to ground. The total input impedance becomes
the parallel combination of R_G and R_M.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes
part of the noise gain equation and hence, influences the
bandwidth. For the example in Figure 7, the R_M value
combines in parallel with the external 50Ω source imped-
ance, yielding an effective driving impedance of
50Ω || 57.6Ω = 26.8Ω. This impedance is added in series
with R_G for calculating the noise gain. The resultant is 2.87
for Figure 7, as opposed to only 2 if R_M could be eliminated
as discussed above. The bandwidth will, therefore, be lower
for the gain of –2 circuit of Figure 7 (NG = +2.87) than for
the gain of +2 circuit of Figure 1.
The third important consideration in inverting amplifier design
is setting the bias current cancellation resistors on the non-
inverting input (parallel combination of R_T = 750Ω). If this
resistor is set equal to the total DC resistance looking out of the
inverting node, the output DC error, due to the input bias
currents, will be reduced to (Input Offset Current) • R_F. Because
of the 0.1µF capacitor, the inverting input’s bias current flows
through RF. Thus, R_T = 750Ω = 1.50kΩ || 1.50kΩ is needed for
the minimum output offset voltage. To reduce the additional
high-frequency noise introduced by R_T, and power-supply
feedthrough, it is bypassed with a 0.1µF capacitor. At a
minimum, the OPA2634 should see a source resistance of at
least 50Ω to damp out parasitic-induced peaking—a direct
short to ground on the non-inverting input runs the risk of a very
high-frequency instability in the input stage.
OUTPUT CURRENT AND VOLTAGE
The OPA2634 provides outstanding output voltage capabil-
ity. Under no-load conditions at +25°C, the output voltage
typically swings closer than 140mV to either supply rail; the
guaranteed over temperature swing is within 300mV of
either rail (V_S = +5V).
The minimum specified output voltage and current specifi-
cations over temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold start-up will the
output current and voltage decrease to the numbers shown in
the guaranteed tables. As the output transistors deliver power,
their junction temperatures will increase, decreasing their
V_BE’s (increasing the available output voltage swing) and
increasing their current gains (increasing the available out-
put current). In steady-state operation, the available output
voltage and current will always be greater than that shown
in the over-temperature specifications, since the output stage
junction temperatures will be higher than the minimum
specified operating ambient.
To maintain maximum output stage linearity, no output
short-circuit protection is provided. This will not normally
be a problem, since most applications include a series
matching resistor at the output that will limit the internal
power dissipation if the output side of this resistor is shorted
to ground.
OPA2634
13
SBOS098A