LMH2180SDE Datasheet, PDF (13/18 Pages) Texas Instruments – LMH2180 75 MHz Dual Clock Buffer

Application Information
GENERAL
The LMH2180 is designed to minimize the effects of spurious
signals from the base chip to the oscillator. Also the influence
of varying load resistance and capacitance to the oscillator is
minimized, while the drive capability is increased.
The inputs of the LMH2180 are internally biased at 1V, mak-
ing AC coupling possible without external bias resistors.
To optimize current consumption, a buffer that is not in use
can be disabled by connecting it's enable pin to V_SS.
The LMH2180 has no internal ground reference; therefore,
either single or split supply configurations can be used.
The LMH2180 is an easy replacement for discrete circuitry. It
simplifies board layout and minimizes the effect of layout re-
lated parasitic components.
INPUT CONFIGURATION
The internal 1V input biasing allows AC coupling of the input
signal. This biasing avoids the use of external resistors, as
depicted in Figure 1. The biasing prevents a large DC load at
the oscillators output that creates a load impedance and may
affect it's oscillating frequency. As a result of this biasing, the
maximum amplitude of the AC signal is 2V_PP.
The coupling capacitance C1 should be large enough to let
the AC signal pass. This is a unity gain buffer with rail-to-rail
inputs and outputs.
teristic graphic entitled Isolation Output to Input vs. Frequen-
cy.
A block diagram of the isolation is shown in Figure 2.
Crosstalk rejection between buffers prevents signals from af-
fecting each other. Figure 2 shows a Baseband IC and a
Bluetooth module as an example. See the characteristic
graphic labeled Crosstalk Rejection vs. Frequency for more
information.
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FIGURE 2. Isolation Block Diagram
DRIVING CAPACITIVE LOADS
Each buffer can drive a capacitive load. Be aware that every
capacitor directly connected to the output becomes part of the
loop of the buffer. In most applications the load consists of the
capacitance of copper tracks and the input capacitance of the
application blocks. Capacitance reduces the gain/phase mar-
gin and decreases the stability. This leads to peaking in the
frequency response and in extreme situations oscillations can
occur. To drive a large capacitive load it is recommended to
include a series resistor between the buffer and the load ca-
pacitor. The best value for this isolation resistance can be
found by experimentation.
The LMH2180 datasheet reflects measurements with capac-
itive loads of 10 pF at the output of the buffers. Most common
applications will probably use a lower capacitive load, which
will result in lower peaking and significantly greater band-
width, see Figure 3.
FIGURE 1. Input Configuration
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FREQUENCY PULLING
Frequency pulling is the frequency variation of an oscillator
caused by a varying load. In the typical application, the load
of the oscillator is a fixed capacitor (C1) in series with the input
impedance of the buffer.
To keep the input impedance as constant as possible, the in-
put is biased at 1V, even when the part is disabled. A simpli-
fied schematic of the input configuration is shown in Figure
1.
ISOLATION AND CROSSTALK
Output to input isolation prevents the clock signal of the os-
cillator from being affected by spurious signals generated by
the digital blocks behind the output buffer. See the charac-
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FIGURE 3. Bandwidth and Peaking
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