LMC6442 Datasheet, PDF (13/24 Pages) National Semiconductor (TI) – Dual Micropower Rail-to-Rail Output Single Supply Operational Amplifier

LMC6442
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SNOS013E – SEPTEMBER 1997 – REVISED MARCH 2013
Looking at the problem from a different view, with R_F defined by A_V•Rin, one could select a value for R in the “T”
Network and then determine R1 based on this selection:
(4)
Figure 37. “T” Network Values for Various Values of R
For convenience, Figure 37 shows R1 vs. R_F for different values of R.
DESIGN CONSIDERATIONS FOR CAPACITIVE LOADS
As with many other opamps, the LMC6442 is more stable at higher closed loop gains when driving a capacitive
load. Figure 38 shows minimum closed loop gain versus load capacitance, to achieve less than 10% overshoot in
the output small signal response. In addition, the LMC6442 is more stable when it provides more output current
to the load and when its output voltage does not swing close to V^−.
The LMC6442 is more tolerant to capacitive loads when the equivalent output load resistance is lowered or when
output voltage is 1V or greater from the V^− supply. The capacitive load drive capability is also improved by
adding an isolating resistor in series with the load and the output of the device. Figure 39 shows the value of this
resistor for various capacitive loads (A_V = −1), while limiting the output to less than 10 % overshoot.
Referring to the Typical Performance Characteristics plot of Phase Margin (Worst Case) vs. Supply Voltage, note
that Phase Margin increases as the equivalent output load resistance is lowered. This plot shows the expected
Phase Margin when the device output is very close to V^−, which is the least stable condition of operation.
Comparing this Phase Margin value to the one read off the Open Loop Gain/Phase vs. Frequency plot, one can
predict the improvement in Phase Margin if the output does not swing close to V^−. This dependence of Phase
Margin on output voltage is minimized as long as the output load, R_L, is about 1MΩ or less.
Output Phase Reversal: The LMC6442 is immune against this behavior even when the input voltages exceed
the common mode voltage range.
Output Time Delay: Due to the ultra low power consumption of the device, there could be as long as 2.5 ms of
time delay from when power is applied to when the device output reaches its final value.
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