BQ35100 Datasheet, PDF (13/26 Pages) Texas Instruments – Lithium Primary Battery Fuel Gauge

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CNTL FUNCTION
CONTROL_STATUS
DEVICE_TYPE
FW_VERSION
HW_VERSION
STATIC_CHEM_CHKSUM
CHEM_ID
PREV_MACWRITE
BOARD_OFFSET
CC_OFFSET
CC_OFFSET_SAVE
DF_VERSION
GAUGE_START
GAUGE_STOP
SELAED
CAL_ENABLE
LT_ENABLE
RESET
EXIT_CAL
ENTER_CAL
NEW_BATTERY
CNTL DATA
0x0000
0x0001
0x0002
0x0003
0x0005
0x0006
0x0007
0x0009
0x000A
0x000B
0x000C
0x0011
0x0012
0x0020
0x002D
0x002E
0x0041
0x0080
0x0081
0xa613
bq35100
SLUSCM6A – JUNE 2016 – REVISED JULY 2016
Table 2. Control Functions
SEALED ACCESS
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Yes
DESCRIPTION
Reports the status of key features
Reports the device type of 0x40 (indicating bq35100)
Reports the firmware version on the device type
Reports the hardware version of the device type
Calculates chemistry checksum
Reports the chemical identifier used by the gas
gauge algorithms
Returns previous Control() command code
Forces the device to measure and store the board
offset
Forces the device to measure the internal CC offset
Forces the device to store the internal CC offset
Reports the data flash version on the device
Triggers the device to enter active mode
Triggers the device to stop gauging and complete all
outstanding tasks
Places the device in SEALED access mode
Toggle CALIBRATION mode enable
Enables Lifetime Data collection
Forces a full reset of the device
Exit CALIBRATION mode
Enter CALIBRATION mode
This is used to refresh the gauge when a new battery
is installed and resets all recorded data.
7.3.9 Communications
7.3.9.1 I²C Interface
The gas gauge supports the standard I²C read, incremental read, one-byte write quick read, and functions. The
7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit
device address is therefore 0xAA or 0xAB for write or read, respectively.
Host Generated
Fuel Gauge Generated
S ADDR[6:0] 0 A
CMD[7:0]
(a)
A DATA[7:0]
AP
S ADDR[6:0] 1 A DATA[7:0] N P
(b)
S ADDR[6:0] 0 A CMD[7:0]
A Sr ADDR[6:0]
(c)
1A
DATA[7:0]
NP
S ADDR[6:0] 0 A CMD[7:0]
A Sr
ADDR[6:0]
(d)
1A
DATA[7:0]
A . . . DATA[7:0] N P
Figure 6. Supported I²C Formats: (a) 1-Byte Write, (b) Quick Read, (c) 1 Byte-read, and (d) Incremental
Read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop).
The “quick read” returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I²C communication engine, increments whenever data is acknowledged by the device or the I²C
master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as 2-byte commands that require two bytes of data).
S ADDR[6:0] 0 A CMD[7:0]
A DATA[7:0]
AP
Figure 7. Attempt To Write a Read-Only Address (Nack After Data Sent By Master)
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