ADS58C28_16 Datasheet, PDF (13/68 Pages) Texas Instruments – Dual Channel IF Receiver with SNRBoost 3G

ADS58C28
www.ti.com
INB_P
INB_M
CLK_P
CLK_M
INA_P
INA_M
CM
SBAS509B – JUNE 2010 – REVISED OCTOBER 2010
FUNCTIONAL BLOCK DIAGRAM
Channel B
AVDD AGND
DRVDD DRGND
14-Bit
ADC
Digital Processing
Block
SNRBoost^3G
DDR
11
Serializer
CHB0_P
CHB0_M
CHB2_P
CHB2_M
CHB4_P
CHB4_M
CHB6_P
CHB6_M
CHB8_P
CHB8_M
CHB10_P
CHB10_M
CLOCKGEN
Output
Clock Buffer
CLKOUT_P
CLKOUT_M
Channel A
14-Bit
ADC
Digital Processing
Block
SNRBoost^3G
DDR
11
Serializer
CHA0_P
CHA0_M
CHA2_P
CHA2_M
CHA4_P
CHA4_M
CHA6_P
CHA6_M
CHA8_P
CHA8_M
CHA10_P
CHA10_M
Reference
Control
Interface
ADS58C28
Figure 4. ADS58C28 Block Diagram (LVDS Interface)
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): ADS58C28
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