TUSB214 Datasheet, PDF (12/23 Pages) Texas Instruments – USB 2.0 High Speed Signal Conditioner with BC1.2 CDP

TUSB214
SLLSEX7 – AUGUST 2017
Typical Application (continued)
DC Boost
Table 3. Design Parameters (continued)
R_DC1
22k - 47k ohms
DNI
DNI
PARAMETER
R_DC2
Do Not Install (DNI)
DNI
22k - 47k ohms
Level
40mV Low DC Boost
60mV Mid DC Boost
80mV High DC Boost
www.ti.com
VALUE
Mid DC Level:
R_DC1 = DNI
R_DC2 = DNI
8.2.2 Detailed Design Procedure
TUSB214 requires a valid reset signal as described in the power supply recommendations section. The capacitor
at RSTN pin is not required if a microcontroller drives the RSTN pin according to recommendations.
VREG pin is the internal LDO output that requires a 0.1-μF external capacitor to GND to stabilize the core.
The ideal AC/DC Boost setting is dependent upon the signal chain loss characteristics of the target platform. The
general recommendation is to start with AC Boost level 0, and then increment to AC Boost level 1, etc. when
needed. Same applies to the DC boost setting where it is recommended to plan for the required pad to change
boost settings.
In order for the TUSB214 to recognize any change to the AC or DC boost settings, the RSTN pin must be
toggled. This is because the EQ and DC_BOOST pins are latched on power up and the pins are ignored
thereafter.
Further D1P has to be shorted to D2P and D1M shorted to D2M on the board for correct functionality of the
device.
Placement of the device is also dependent on the application goal. Table 4 summarizes our recommendations.
Table 4. Platform Placement Guideline
PLATFORM GOAL
Pass USB Near End Mask
Pass USB Far End Eye Mask
Cascade multiple TUSB214 to improve device enumeration
SUGGESTED TUSB214 PLACEMENT
Close to measurement point
Close to USB PHY
Midway between each USB interconnect
12
Submit Documentation Feedback
Product Folder Links: TUSB214
Copyright © 2017, Texas Instruments Incorporated