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TPS7H3301-SP Datasheet, PDF (12/30 Pages) Texas Instruments – Sink/Source TID and SEE Hardened 3-A DDR Termination Regulator
TPS7H3301-SP
SLVSCJ5 – DECEMBER 2015
8 Detailed Description
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8.1 Overview
The TPS7H3301-SP device is a sink and source double data rate (DDR) termination regulator specifically
designed for low input voltage, low-cost, low-noise systems where space and weight is a key consideration.
8.2 Functional Block Diagram
VDDQSNS 2
+
2.25 V
VDD/VIN 10
VOSNS/VTTSNS 16
UVLO
+
EN 9
PGND 15
REFINOK
ENVTT
Gm
+
Gm
+
+
3,4,5 VLDOIN
1 VTTREF
DchgREF
DchgVTT
Startup
Delay
12,13,14 VO/VTT
6,7,8 PGND
11 PGOOD
8.3 Feature Description
8.3.1 VO Sink/Source Regulator
The TPS7H3301-SP is a 3A sink/source tracking termination regulator specifically designed for low input voltage,
low-cost, and low external component count systems where space is a key application parameter. The
TPS7H3301-SP integrates a high-performance, low-dropout (LDO) linear regulator that is capable of both
sourcing and sinking current. The LDO regulator employs a fast feedback loop so that ceramic capacitors can be
used to support the fast load transient response. To achieve tight regulation with minimum effect of trace
resistance, a remote sensing pin, VOSNS/VTTSNS, should be connected to the positive pin of the output
capacitor(s) as a separate trace from the high current path from Vo/VTT.
The TPS7H3301-SP has a dedicated pin VLDOIN, for VTT power supply to minimize the LDO power dissipation
on user application. The minimum VLDOIN voltage is 400mV above the 1/2 VDDQSNS voltage or as highlighted
in electrical table VLDOIN to VTT headroom for various load conditions.
12
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