OPA2680 Datasheet, PDF (12/22 Pages) Burr-Brown (TI) – Dual Wideband, Voltage Feedback OPERATIONAL AMPLIFIER With Disable

current. A demanding 100Ω load to a midpoint bias is used
in this characterization circuit. The new output stage circuit
used in the OPA2680 can deliver large bipolar output cur-
rents into this midpoint load with minimal crossover distor-
tion, as shown in the +5V supply, 3rd harmonic distortion
plots.
SINGLE SUPPLY A/D CONVERTER INTERFACE
Most modern, high performance analog-to-digital convert-
ers (such as the Burr-Brown ADS8xx and ADS9xx series)
operate on a single +5V (or lower) power supply. It has been
a considerable challenge for single supply op amps to
deliver a low distortion input signal at the ADC input for
signal frequencies exceeding 5MHz. The high slew rate,
exceptional output swing and high linearity of the OPA2680
make it an ideal single supply ADC driver. The circuit on the
front page shows one possible interface particularly suited to
DC-coupled pulse digitization requirements. Figure 3 shows
the AC-coupled test circuit of Figure 2 modified for a
capacitive (A/D) load and with an optional output pull-down
resistor (R_B).
The OPA2680 in the circuit of Figure 3 provides >200MHz
bandwidth for a 2Vp-p output swing. Minimal 3rd harmonic
distortion or two-tone, 3rd-order intermodulation distortion
will be observed due to the very low crossover distortion in
the OPA2680 output stage. The limit of output Spurious
Free Dynamic Range (SFDR) will be set by the 2nd har-
monic distortion. Without R_B, the circuit of Figure 3 mea-
sured at 10MHz shows an SFDR of 65dBc. This may be
improved by pulling additional DC bias current (I_B) out of
the output stage through the optional R_B resistor to ground
(the output midpoint is at 2.5V for Figure 3). Adjusting I_B
gives the improvement in SFDR shown in Figure 4. SFDR
improvement is achieved for I_B values up to 6mA, with
worse performance for higher values. Using the dual
OPA2680 in an IQ receiver channel will give matched AC
performance through high frequencies.
73
V_O = 2Vp-p, 10MHz
72
71
70
69
68
67
66
65
0 123 456 78
Output Pull-Down Current (mA)
9 10
FIGURE 4. SFDR vs I_B.
HIGH PERFORMANCE DAC TRANSIMPEDANCE
AMPLIFIER
High frequency DDS DACs require a low distortion output
amplifier to retain their SFDR performance into real-world
loads. A differential output drive implementation is shown
in Figure 5. The diagram shows the signal output current(s)
connected into the virtual ground summing junction(s) of
the OPA2680, which is set up as a transimpedance stage or
“I-V converter”. If the DAC requires its outputs terminated
to a compliance voltage other than ground for operation,
the appropriate voltage level may be applied to the non-
inverting inputs of the OPA2680. The DC gain for this
circuit is equal to R_F. At high frequencies, the DAC output
capacitance (C_D in Figure 5) will produce a zero in the
noise gain for the OPA2680 that may cause peaking in the
closed-loop frequency response. C_F is added across R_F to
compensate for this noise gain peaking. To achieve a flat
+5V
V_I
1Vp-p
0.1µF
698Ω
50Ω
59Ω
698Ω
Power supply decoupling not shown
1/2
OPA2680
R_S
30Ω
50pF
2.5V DC
±1V AC
ADC Input
402Ω
402Ω
0.1µF
R_B
I_B
FIGURE 3. Single-Supply ADC Input Driver. One of Two Channels.
®
OPA2680
12