ONET8531T_16 Datasheet, PDF (12/17 Pages) Texas Instruments – 11.3 Gbps Limiting Transimpedance Amplifier

ONET8531T
SLLS891B – FEBRUARY 2008 – REVISED AUGUST 2011
CHIP DIMENSIONS AND PAD LOCATIONS
19 18 17 16 15 14
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1
12
2
11
10
3
9
4 5 6 78
Origin
0.0
x
940 mm
Die Thickness: 203 ± 13 µm
Pad Dimensions: 105 × 65 µm
Die Size: 940 ± 40 µm × 1195 ± 40 µm
PAD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Table 1. Bond Pad Locations and Descriptions
COORDINATES
(based on typical die size)
x (μm)
y (μm)
116
739
116
575
116
289
243
136
358
136
473
136
588
136
703
136
828
289
828
404
828
575
828
739
828
910
760
1063
645
1063
530
1063
415
1063
300
1063
185
1063
SYMBOL
OUT+
VCC_OUT
VCC_IN
GND
FILTER1
IN
FILTER2
GND
RSSI_IB
RSSI_EB
NC
OUT–
GND
GND
GND
GND
GND
GND
GND
TYPE
DESCRIPTION
Analog output
Supply
Supply
Supply
Analog
Analog input
Analog
Supply
Analog output
Analog output
Analog output
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Non-inverted data output
3.3V supply voltage
3.3V supply voltage
Circuit ground
Bias voltage for photodiode
Data input to TIA
Bias voltage for photodiode
Circuit ground
RSSI output signal for internally biased receivers
RSSI output signal for externally biased receivers
Not connected
Inverted data output
Circuit ground
Circuit ground
Circuit ground
Circuit ground
Circuit ground
Circuit ground
Circuit ground
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