LP38512-ADJ Datasheet, PDF (12/24 Pages) National Semiconductor (TI) – 1.5A Fast-Transient Response Adjustable Low-Dropout Linear Voltage Regulator

LP38512-ADJ
SNVS546D – JANUARY 2009 – REVISED APRIL 2013
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Figure 21. θ_JA vs Thermal Via Count for the PFM Package on 4–Layer PCB
Figure 22 shows the thermal performance when the Thin TO-263 is mounted to a two layer PCB where the
copper area is predominately directly under the exposed DAP.As shown in the figure, increasing the copper area
beyond 1 square inch produces very little improvement.
Figure 22. θ_JA vs Copper Area for the PFM Package
Heat-Sinking The SO PowerPad Package
The DAP of the SO PowerPad package is soldered to the copper plane for heat sinking. The LP38512MR
package has a θ_JA rating of 168°C/W, and a θ_JC rating of 11°C/W. The θ_JA rating of 168°C/W includes the device
DAP soldered to an area of 0.008 square inches (0.09 in x 0.09 in) of 1 ounce copper on a two sided PCB, with
no airflow. See JEDEC standard EIA/JESD51-3 for more information.
Figure 23 shows a curve for different thermal via counts under the exposed DAP, using a four layer PCB for heat
sinking. The thermal vias connect the copper area directly under the exposed DAP to the first internal copper
plane only. See JEDEC standards EIA/JESD51-5 and EIA/JESD51-7 for more information.
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