DS91M040_16 Datasheet, PDF (12/20 Pages) Texas Instruments – 125 MHz Quad M-LVDS Transceiver

DS91M040
SNLS283M – FEBRUARY 2008 – REVISED APRIL 2013
www.ti.com
FSEN
L
L
L
L
DS91M040 as Type 1 Receiving⁽¹⁾
Inputs
RE
DE
A−B
L
X
≥ +0.05V
L
X
≤ −0.05V
L
X
−0.05V
≤ A-B ≤ +0.05V
H
X
X
Output
RO
H
L
Undefined
Z
(1) X — Don't care condition
Z — High impedance state
FSEN
RE
H
L
H
L
H
L
H
H
DS91M040 as Type 2 Receiving⁽¹⁾
Inputs
DE
A−B
X
≥ +0.15V
X
≤ +0.05V
X
+0.05V
≤ A-B ≤ +0.15V
X
X
Output
RO
H
L
Undefined
Z
(1) X — Don't care condition
Z — High impedance state
DS91M040 Type 1 Receiver Input Threshold Test Voltages⁽¹⁾
Applied Voltages
Resulting Differential Input Voltage
Resulting Common-Mode Input
Voltage
V_IA
2.400V
V_IB
0.000V
V_ID
2.400V
V_ICM
1.200V
0.000V
2.400V
−2.400V
1.200V
3.800V
3.750V
0.050V
3.775V
3.750V
3.800V
−0.050V
3.775V
−1.350V
−1.400V
0.050V
−1.375V
−1.400V
−1.350V
−0.050V
−1.375V
Receiver Output
R
H
L
H
L
H
L
(1) H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
DS91M040 Type 2 Receiver Input Threshold Test Voltages⁽¹⁾
Applied Voltages
Resulting Differential Input Voltage
Resulting Common-Mode Input
Voltage
V_IA
2.400V
V_IB
0.000V
V_ID
2.400V
V_IC
1.200V
0.000V
2.400V
−2.400V
1.200V
3.800V
3.650V
0.150V
3.725V
3.800V
3.750V
0.050V
3.775V
−1.250V
−1.400V
0.150V
−1.325V
−1.350V
−1.400V
0.050V
−1.375V
Receiver Output
R
H
L
H
L
H
L
(1) H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
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