DRV8814_16 Datasheet, PDF (12/26 Pages) Texas Instruments – DC Motor Driver IC

DRV8814
SLVSAB9E – MAY 2010 – REVISED NOVEMBER 2015
www.ti.com
If the DECAY pin is high (fast decay), when the bridge is disabled fast decay mode will be entered until the
current through the bridge reaches zero. Once the current is at zero, the bridge is disabled to prevent the motor
from reversing direction. This allows the motor to coast to a stop.
If the DECAY pin is low (slow decay), both low-side FETs will be turned on when ENBL is made inactive. This
essentially shorts out the back EMF of the motor, causing the motor to brake, and stop quickly. The low-side
FETs will stay in the ON state even after the current reaches zero.
7.4.4 Blanking Time
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time
before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also
sets the minimum on time of the PWM.
7.4.5 nRESET and nSLEEP Operation
The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs
are ignored while nRESET is active.
Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the
gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In
this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time
(approximately 1 ms) needs to pass before the motor driver becomes fully operational.
7.4.6 Protection Circuits
The DRV8814 is fully protected against undervoltage, overcurrent and overtemperature events.
7.4.6.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled and the
nFAULT pin will be driven low. The device will remain disabled until either nRESET pin is applied, or VM is
removed and re-applied.
Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor
winding will all result in an overcurrent shutdown. Note that overcurrent protection does not use the current sense
circuitry used for PWM current control, and is independent of the I_SENSEresistor value or VREF voltage.
7.4.6.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be
driven low. Once the die temperature has fallen to a safe level operation will automatically resume.
7.4.6.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the
device will be disabled and internal logic will be reset. Operation will resume when V_Mrises above the UVLO
threshold.
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