TMS320F28027_17 Datasheet, PDF (115/138 Pages) Texas Instruments – Piccolo Microcontrollers

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TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022
TMS320F28021, TMS320F28020, TMS320F280200
SPRS523K – NOVEMBER 2008 – REVISED JUNE 2016
GPIOLMPSEL
LPMCR0
GPIOXINT1SEL
GPIOXINT2SEL
GPIOXINT3SEL
GPIOx pin
Low P ower
Modes Block
External Interrupt
PIE
MUX
Asynchronous
path
GPxPUD
Internal
Pullup
GPxQSEL1/2
GPxCTRL
Input
Qualification
Asynchronous path
High Impedance
Output Control
0 = Input, 1 = Output
XRS
GPxDAT (read)
00 N/C
01 ^{Peripheral 1 Input}
10 Peripheral 2 Input
11 _{Peripheral 3 Input}
GPxTOGGLE
GPxCLEAR
GPxSET
00
GPxDAT (latch)
01
Peripheral 1 Output
10 Peripheral 2 Output
11 Peripheral 3 Output
00
GPxDIR (latch)
01 Peripheral 1 Output Enable
10 Peripheral 2 Output Enable
11
Peripheral 3 Output Enable
= Default at Reset
GPxMUX1/2
A. x stands for the port, either A or B. For example, GPxDIR refers to either the GPADIR and GPBDIR register
depending on the particular GPIO pin selected.
B. GPxDAT latch/read are accessed at the same memory location.
C. This is a generic GPIO MUX block diagram. Not all options may be applicable for all GPIO pins. See the
TMS320x2802x/TMS320F2802xx Piccolo System Control and Interrupts Reference Guide for pin-specific variations.
Figure 6-40. GPIO Multiplexing
Copyright © 2008–2016, Texas Instruments Incorporated
Detailed Description 115
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TMS320F28020 TMS320F280200