LM3S9781_15 Datasheet, PDF (1111/1271 Pages) Texas Instruments – Stellaris LM3S9781 Microcontroller

Stellaris^® LM3S9781 Microcontroller
Register 8: Analog Comparator Control 0 (ACCTL0), offset 0x024
Register 9: Analog Comparator Control 1 (ACCTL1), offset 0x044
Register 10: Analog Comparator Control 2 (ACCTL2), offset 0x064
These registers configure the comparator’s input and output.
Analog Comparator Control 0 (ACCTL0)
Base 0x4003.C000
Offset 0x024
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
15
Type RO
Reset
0
14
13
reserved
RO
RO
0
0
12
11
10
9
8
7
TOEN
ASRCP
reserved TSLVAL
RO
R/W
R/W
R/W
RO
R/W
0
0
0
0
0
0
22
21
RO
RO
0
0
6
5
TSEN
R/W
R/W
0
0
20
RO
0
4
ISLVAL
R/W
0
19
18
RO
RO
0
0
3
2
ISEN
R/W
R/W
0
0
17
16
RO
RO
0
0
1
CINV
R/W
0
0
reserved
RO
0
Bit/Field
31:12
11
Name
reserved
TOEN
Type
RO
R/W
Reset Description
0x0000.0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Trigger Output Enable
Value Description
0 ADC events are suppressed and not sent to the ADC.
1 ADC events are sent to the ADC.
10:9
ASRCP
R/W
0x0
Analog Source Positive
The ASRCP field specifies the source of input voltage to the VIN+ terminal
of the comparator. The encodings for this field are as follows:
Value Description
0x0 Pin value of Cn+
0x1 Pin value of C0+
0x2 Internal voltage reference (V_IREF)
0x3 Reserved
8
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
7
TSLVAL
R/W
0
Trigger Sense Level Value
Value Description
0 An ADC event is generated if the comparator output is Low.
1 An ADC event is generated if the comparator output is High.
July 03, 2014
Texas Instruments-Production Data
1111