TM4C1292NCZAD Datasheet, PDF (1103/1844 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1292NCZAD Microcontroller
ADC Sample Phase Control (ADCSPC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0x024
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PHASE
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:4
3:0
Name
reserved
PHASE
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RW
0x0
Phase Lag
This field selects the sample phase lag from the standard sample time.
Value Description
0x0 The ADC samples are concurrent.
0x1 The ADC sample lags by 1 ADC clock
0x2 The ADC sample lags by 2 ADC clocks
0x3 The ADC sample lags by 3 ADC clocks
0x4 The ADC sample lags by 4 clocks
0x5 The ADC sample lags by 5 clocks
0x6 The ADC sample lags by 6 clocks
0x7 The ADC sample lags by 7 clocks
0x8 The ADC sample lags by 8 clocks
0x9 The ADC sample lags by 9 clocks
0xA The ADC sample lags by 10 clocks
0xB The ADC sample lags by 11 clocks
0xC The ADC sample lags by 12 clocks
0xD The ADC sample lags by 13 clocks
0xE The ADC sample lags by 14 clocks
0xF The ADC sample lags by 15 clocks
June 18, 2014
Texas Instruments-Production Data
1103