LP38513-ADJ Datasheet, PDF (11/18 Pages) National Semiconductor (TI) – 3A Fast-Transient Response Adjustable Low-Dropout Linear Voltage Regulator

LP38513-ADJ
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V_OUT
0.80V
1.00V
1.20V
1.50V
1.80V
2.00V
2.50V
3.00V
3.30V
R1
1.07 kΩ
1.00 kΩ
1.40 kΩ
2.00 kΩ
2.94 kΩ
1.02 kΩ
1.02 kΩ
1.00 kΩ
2.00 kΩ
Table 1.
R2
1.78 kΩ
1.00 kΩ
1.00 kΩ
1.00 kΩ
1.13 kΩ
340Ω
255Ω
200Ω
357Ω
SNVS514C – JANUARY 2009 – REVISED APRIL 2013
C_FF
4700 pF
4700 pF
3300 pF
2700 pF
1500 pF
4700 pF
4700 pF
4700 pF
2700 pF
F_Z
31.6 kHz
33.8 kHz
34.4 kHz
29.5 kHz
36.1 kHz
33.2 kHz
33.2 kHz
33.8 kHz
29.5 kHz
Please refer to Application Note AN-1378 Method For Calculating Output Voltage Tolerances in Adjustable
Regulators SNVA112 for additional information on how resistor tolerances affect the calculated V_OUT value.
ENABLE OPERATION
The Enable ON threshold is typically 1.2V, and the OFF threshold is typically 1.0V. To ensure reliable operation
the Enable pin voltage must rise above the maximum V_EN(ON) threshold and must fall below the minimum V_EN(OFF)
threshold. The Enable threshold has typically 200mV of hysteresis to improve noise immunity.
The Enable pin (EN) has no internal pull-up or pull-down to establish a default condition and, as a result, this pin
must be terminated either actively or passively.
If the Enable pin is driven from a single ended device (such as the collector of a discrete transistor) a pull-up
resistor to V_IN, or a pull-down resistor to ground, will be required for proper operation. A 1 kΩ to 100 kΩ resistor
can be used as the pull-up or pull-down resistor to establish default condition for the EN pin. The resistor value
selected should be appropriate to swamp out any leakage in the external single ended device, as well as any
stray capacitance.
If the Enable pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator
output), the pull-up, or pull-down, resistor is not required.
If the application does not require the Enable function, the pin should be connected directly to the adjacent V_IN
pin.
POWER DISSIPATION/HEAT-SINKING
A heat-sink may be required depending on the maximum power dissipation (P_D(MAX)), maximum ambient
temperature (T_A(MAX))of the application, and the thermal resistance (θ_JA) of the package. Under all possible
conditions, the junction temperature (T_J) must be within the range specified in the Operating Ratings. The total
power dissipation of the device is given by:
P_D = ( (V_IN−V_OUT) x I_OUT) + ((V_IN) x I_GND)
(7)
where I_GND is the operating ground current of the device (specified under Electrical Characteristics).
The maximum allowable junction temperature rise (ΔT_J) depends on the maximum expected ambient
temperature (T_A(MAX)) of the application, and the maximum allowable junction temperature (T_J(MAX)):
ΔT_J = T_J(MAX) − T_A(MAX)
(8)
The maximum allowable value for junction to ambient Thermal Resistance, θ_JA, can be calculated using the
formula:
θ_JA = ΔT_J / P_D(MAX)
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Product Folder Links: LP38513-ADJ
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