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LMH0056_15 Datasheet, PDF (11/20 Pages) Texas Instruments – HD/SD SDI Reclocker with 4:1 Input Multiplexer
LMH0056
www.ti.com
LOCK DETECT
0
1
X
0
1
1
X
OUTPUT MUTE
1
1
0
LOCK DETECT
LOCK DETECT
LOCK DETECT
1
SNLS236C – AUGUST 2006 – REVISED APRIL 2013
Table 3. Control Functionality
BYPASS/AUTO BYPASS
0
0
X
X
0
1
1
DEVICE STATUS
PLL unlocked, reclocker bypassed
PLL locked to supported data rate, reclocker not bypassed
Outputs muted
Outputs muted
PLL locked to supported data rate, reclocker not bypassed
PLL locked to supported data rate, reclocker bypassed
Outputs not muted, reclocker bypassed
SD/HD
The SD/HD output indicates whether the LMH0056 is processing SD or HD data rates. It may be used to control
another device such as the LMH0002 cable driver. When this output is high it indicates that the data rate is 270
Mbps (or 143 Mbps). When low, the indicated data rate is 1483 or 1485 Mbps. The SD/HD output is a registered
function and is only valid when the PLL is locked and the Lock Detect output is high. When the PLL is not locked
(the Lock Detect output is low), the SD/HD output defaults to HD (low). The SD/HD output is undefined for a
short time after lock detect assertion or de-assertion due to a data rate change on SDI. See Figure 4 for a timing
diagram showing the relationship between SDI, Lock Detect, and SD/HD.
SDI
NO DATA
270 MBPS DATA
NO DATA
TACQ
T2
1485 MBPS DATA
NO DATA
TACQ
T2
Lock
Detect
T1
T1
T1
SD/HD
SDI
NO DATA
143 MBPS DATA
TACQ
270 MBPS DATA
TACQ
T2
1485 MBPS DATA
270 MBPS DATA
TACQ
TACQ
T2
T2
Lock
Detect
SD/HD
T1
T1
T1
T1
T1
T1
TACQ = Acquisition Time, defined in the AC Electrical Characteristics Table
T1 = Time from Lock Detect assertion or deassertion until SD/HD output is valid, typically 37 ns (one 27 MHz clock period)
T2 = Time from SDI input change until Lock Detect de-assertion, 1 ms maximum. SD/HD output is not valid during this time.
Figure 4. SDI, Lock Detect, and SD/HD
Copyright © 2006–2013, Texas Instruments Incorporated
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