LMH0056_15 Datasheet, PDF (1/20 Pages) Texas Instruments – HD/SD SDI Reclocker with 4:1 Input Multiplexer

LMH0056
www.ti.com
SNLS236C – AUGUST 2006 – REVISED APRIL 2013
LMH0056 HD/SD SDI Reclocker with 4:1 Input Multiplexer
Check for Samples: LMH0056
FEATURES
1
•2 Supports SMPTE 292M and SMPTE 259M (A &
C) Serial Digital Video Standards
• Supports 143 Mbps, 270 Mbps, 1.483 Gbps,
and 1.485 Gbps Serial Data Rate Operation
• Supports DVB-ASI at 270 Mbps
• Single 3.3V Supply Operation
• 360 mW Typical Power Consumption
• Integrated 4:1 Multiplexed Input
• Two Differential, Reclocked Outputs
• Choice of Second Reclocked Output or Low-
Jitter, Differential, Data-Rate Clock Output
• Single 27 MHz External Crystal or Reference
Clock Input
• Manual Rate Select Input
• SD/HD Operating Rate Indicator Output
• Lock Detect Indicator Output
• Output Mute Function for Data and Clock
• Auto/Manual Reclocker Bypass
• Differential LVPECL Compatible Serial Data
Inputs and Outputs
• LVCMOS Control Inputs and Indicator Outputs
• 48-Pin WQFN Package
• Industrial Temperature Range: -40°C to +85°C
APPLICATIONS
• SDTV/HDTV Serial Digital Video Interfaces for:
– Digital Video Routers and Switchers
– Digital Video Processing and Editing
Equipment
– DVB-ASI Equipment
– Video Standards and Format Converters
DESCRIPTION
The LMH0056 HD/SD SDI Reclocker with 4:1 Input
Multiplexer retimes serial digital video data
conforming to the SMPTE 292M and SMPTE 259M
(A & C) standards. The LMH0056 operates at serial
data rates of 143 Mbps, 270 Mbps, 1.483 Gbps and
1.485 Gbps. The LMH0056 supports DVB-ASI
operation at 270 Mbps. The LMH0056 includes an
integrated 4:1 input multiplexer for selecting one of
four input data streams for retiming.
The LMH0056 automatically detects the incoming
data rate and adjusts itself to retime the incoming
data to suppress accumulated jitter. The LMH0056
recovers the serial data-rate clock and optionally
provides it as an output. The LMH0056 has two
differential serial data outputs; the second output may
be selected as a low-jitter, data-rate clock output.
Controls and indicators are: serial clock or second
serial data output select, manual rate select input,
SD/HD rate indicator output, lock detect output,
auto/manual data bypass and output mute. The serial
data inputs, outputs, and serial data-rate clock
outputs are differential LVPECL compatible. The CML
serial data and serial data-rate clock outputs are
suitable for driving 100Ω differentially terminated
networks. The control logic inputs and outputs are
LVCMOS compatible.
The LMH0056 is powered from a single 3.3V supply.
Power dissipation is typically 360 mW. The device is
housed in a 48-pin WQFN package.
1
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated