CC2530ZDK Datasheet, PDF (11/34 Pages) Texas Instruments – A True System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee Applications

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CC2530F32, CC2530F64
CC2530F128, CC2530F256
SWRS081B – APRIL 2009 – REVISED FEBRUARY 2011
ADC CHARACTERISTICS
T_A = 25°C and VDD = 3 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
Input voltage
VDD is voltage on AVDD5 pin
External reference voltage
VDD is voltage on AVDD5 pin
External reference voltage differential
VDD is voltage on AVDD5 pin
Input resistance, signal
Full-scale signal⁽¹⁾
Using 4-MHz clock speed
Peak-to-peak, defines 0 dBFS
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
ENOB ⁽¹⁾
Effective number of bits
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
Useful power bandwidth
7-bit setting, both single and differential
THD ⁽¹⁾
Total harmonic distortion
Single-ended input, 12-bit setting, –6 dBFS
Differential input, 12-bit setting, –6 dBFS
Single-ended input, 12-bit setting
Signal to nonharmonic ratio⁽¹⁾
Differential input, 12-bit setting
Single-ended input, 12-bit setting, –6 dBFS
Differential input, 12-bit setting, –6 dBFS
CMRR
Common-mode rejection ratio
Differential input, 12-bit setting, 1-kHz sine (0 dBFS),
limited by ADC resolution
Crosstalk
Single-ended input, 12-bit setting, 1-kHz sine (0 dBFS),
limited by ADC resolution
Offset
Midscale
Gain error
DNL ⁽¹⁾
Differential nonlinearity
12-bit setting, mean
12-bit setting, maximum
INL ⁽¹⁾
Integral nonlinearity
12-bit setting, mean
12-bit setting, maximum
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
SINAD ⁽¹⁾
(–THD+N)
Signal-to-noise-and-distortion
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
7-bit setting
Conversion time
9-bit setting
10-bit setting
12-bit setting
Power consumption
Internal reference voltage
Internal reference VDD coefficient
Internal reference temperature coefficient
(1) Measured with 300-Hz sine-wave input and VDD as reference.
MIN
TYP MAX UNIT
0
VDD
V
0
VDD
V
0
VDD
V
197
kΩ
2.97
V
5.7
7.5
9.3
10.8
bits
6.5
8.3
10.0
11.5
0–20
kHz
–75.2
dB
–86.6
70.2
79.3
dB
78.8
88.9
>84
dB
>84
dB
–3
mV
0.68
%
0.05
LSB
0.9
4.6
LSB
13.3
35.4
46.8
57.5
66.6
dB
40.7
51.6
61.8
70.8
20
36
μs
68
132
1.2
mA
1.15
V
4
mV/V
0.4
mV/10°C
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