TMS320VC5506_13 Datasheet, PDF (108/117 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Electrical Specifications
Table 5−38. I²C Signals (SDA and SCL) Switching Characteristics
STANDARD
FAST
NO.
PARAMETER
MODE
MODE
UNIT
MIN MAX
MIN
MAX
IC16 tc(SCL)
Cycle time, SCL
10
2.5
µs
IC17 td(SCLH-SDAL) Delay time, SCL high to SDA low for a repeated START condition
4.7
0.6
µs
IC18
td(SDAL-SCLL)
Delay time, SDA low to SCL low for a START and a repeated START
condition
4
0.6
µs
IC19
IC20
IC21
IC22
tw(SCLL)
tw(SCLH)
td(SDA-SCLH)
tv(SCLL-SDAV)
Pulse duration, SCL low
Pulse duration, SCL high
Delay time, SDA valid to SCL high
Valid time, SDA valid
after SCL low
4.7
1.3
µs
4
0.6
µs
250
100
ns
0
0
0.9 µs
IC23 tw(SDAH)
Pulse duration, SDA high between STOP and START conditions
4.7
IC24 tr(SDA)
Rise time, SDA
1000
IC25 tr(SCL)
Rise time, SCL
1000
IC26 tf(SDA)
Fall time, SDA
300
IC27 tf(SCL)
Fall time, SCL
300
IC28 td(SCLH-SDAH) Delay time, SCL high to SDA high for a STOP condition
IC29 Cp
Capacitance for each I2C pin
4
10
† _{Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed.}
1.3
20 + 0.1Cb†
20 + 0.1Cb†
20 + 0.1Cb†
20 + 0.1Cb†
0.6
µs
300 ns
300 ns
300 ns
300 ns
µs
10 pF
SDA
SCL
Stop
IC26
IC23
IC25
IC19
IC20
IC21
Start
IC16
IC18
IC22
IC27
IC18
IC17
Repeated
Start
Figure 5−32. I²C Transmit Timings
IC24
IC28
Stop
108 SPRS375C
October 2006 − Revised January 2008