TMS320DM335_15 Datasheet, PDF (101/160 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC)

TMS320DM335
www.ti.com
SPRS528C – JULY 2008 – REVISED JUNE 2010
5.4 Reset
5.4.1 Reset Electrical Data/Timing
Table 5-2. Timing Requirements for Reset ^{(1) (2)} (see Figure 5-4)
NO.
PARAMETER
1 t_w(RESET)
Active low width of the RESET pulse
2 t_su(BOOT)
Setup time, boot configuration pins valid before RESET rising edge
3 t_h(BOOT)
Hold time, boot configuration pins valid after RESET rising edge
(1) BTSEL[1:0] and AECFG[4:0] are the boot configuration pins during device reset.
(2) C = MXI/CLKIN cycle time in ns. For example, when MXI/CLKIN frequency is 24 MHz use C = 41.6 ns.
DM335
MIN
MAX
12C
12C
12C
1
UNIT
ns
ns
ns
RESET
Boot Configuration Pins
(BTSEL[1:0], AECFG[3:0])
2
3
Figure 5-4. Reset Timing
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DM335 Peripheral Information and Electrical Specifications 101
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