TMS320DM6431_17 Datasheet, PDF (100/227 Pages) Texas Instruments – Digital Media Processor

TMS320DM6431
Digital Media Processor
SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008
www.ti.com
3.7.3.11.1 EMIFA/VPSS Block Pin Selection Procedure
Follow the steps below to perform pin selection for the EMIFA/VPSS Block and its sub-blocks.
1. Major Configuration Options: start with Table 3-38, EMIFA/VPSS Block Major Configuration Choices.
Based on the peripheral needs, the user should select from the major configuration options in this
block: Major Config Options A, B, and E.
2. Sub-Block 2 and Sub-Block 3 Selection: After selecting the major configuration option from
Table 3-38, EMIFA/VPSS Block Major Configuration Choices, the pin selection for Sub-Block 2 and
Sub-Block 3 is complete.
3. Sub-Block 0 Selection: Use Table 3-39 through Table 3-41, EMIFA/VPSS Sub-Block 0 Configuration
Choices, to refine Sub-Block 0 pin selections.
a. Go to the table with the Major Configuration Option chosen in Step 1.
b. Each Major Configuration Option is further divided down into multiple Minor Configuration Options.
Select a Minor Configuration Option that best suits the application need.
c. Within the chosen Minor Configuration Option, further refine the detailed pin configurations by
selecting the settings of PINMUX0 fields CCDCSEL, HVDSEL, CWENSEL, CFLDSEL, and
CI10SEL.
d. The Selection Fields columns show the settings needed to program the PINMUX0 register.
4. Sub-Block 1 Selection: Use Table 3-42 through Table 3-44, EMIFA/VPSS Sub-Block 1 Configuration
Choices, to refine Sub-Block 1 pin selection.
a. Go to the table with the Major Configuration Option chosen in Step 1.
b. Each Major Configuration Option is further divided down into multiple Minor Configuration Options.
Select a Minor Configuration Option that best suits the application need.
c. Within the chosen Minor Configuration Option, further refine the detailed pin configurations by
selecting the settings of PINMUX0 fields CS3SEL, CS4SEL, and CS5SEL.
d. The Selection Fields columns show the settings needed to program the PINMUX0 register.
After following the procedure in this section to determine pin functions for the EMIFA/VPSS Block, the
user should refer to Section 3.7.3.11.7, EMIFA/VPSS Block Pin-By-Pin Multiplexing Summary, for
pin-multiplexing information on a pin-by-pin basis.
3.7.3.11.2 EMIFA/VPSS Block Major Configuration Choices
Table 3-38 shows the major configuration choices in the EMIFA/VPSS Block. For instructions on how to
use the EMIFA/VPSS Block Major Configuration Choices table for the EMIFA/VPSS Block and
Sub-Blocks, see Section 3.7.3.11.1.
100 Device Configurations
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