TL7660_14 Datasheet, PDF (10/23 Pages) Texas Instruments – CMOS VOLTAGE CONVERTER

TL7660
CMOS VOLTAGE CONVERTER
SCAS794 – JUNE 2006
www.ti.com
Output Ripple
APPLICATION INFORMATION (continued)
ESR also affects the ripple voltage seen at the output. The total ripple is determined by two voltages, A and B,
as shown in Figure 4. Segment A is the voltage drop across the ESR of C₂ at the instant it goes from being
charged by C₁ (current flow into C₂) to being discharged through the load (current flowing out of C₂). The
magnitude of this current change is 2 × I_OUT, hence the total drop is 2 × I_OUT × eSR_C2 V. Segment B is the
voltage change across C₂ during time t₂, the half of the cycle when C₂ supplies current to the load. The drop at
B is I_OUT × t₂/C₂ V. The peak-to-peak ripple voltage is the sum of these voltage drops:
V_RIPPLE ≈ (1/(2f_PUMPC₂) + 2(ESR_C2)) × I_OUT
Again, a low ESR capacitor results in a higher performance output.
t₂
t₁
0
V
–V+
B
A
Figure 4. Output Ripple
Paralleling Devices
Any number of TL7660 voltage converters may be paralleled to reduce output resistance (see Figure 5). The
reservoir capacitor, C₂, serves all devices, while each device requires its own pump capacitor, C₁. The resultant
output resistance would be approximately:
R_OUT = R_OUT (of TL7660)/n (number of devices)
V+
1
8
+
C_{1 -}
2 _TL7660 7
3
"1"
6
4
5
+
C_{1 -}
1
8
2 _TL7660 7
3
"n"
6
R_L
4
5
C₂
-
+
Figure 5. Paralleling Devices
10
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