TAS2557 Datasheet, PDF (10/110 Pages) Texas Instruments – 5.7-W Class-D Mono Audio Amplifier with Class-H Boost and Speaker Sense

TAS2557
SLASEC2 – NOVEMBER 2016
www.ti.com
7.8 I²S/LJF/RJF Timing in Master Mode
All specifications at T_A = –40°C to 85°C, IOVDD data sheet limits, V_IL and V_IH applied, V_OL and V_OH measured at datasheet
limits, lumped capacitive load of 20 pF on output pins unless otherwise noted. See Figure 3⁽¹⁾
SYMBOL
PARAMETER
CONDITIONS
IOVDD = 1.8 V
MIN MAX
IOVDD = 3.3
V
MIN MAX
UNIT
t_d(WS)
t_d(DO-WS)
t_d(DO-
BCLK)
BCLK to WCLK delay
WCLK to DOUT delay (For LJF Mode only)
BCLK to DOUT delay
50% of BCLK to 50% of WCLK
50% of WCLK to 50% of DOUT
50% of BCLK to 50% of DOUT
35
25 ns
35
25 ns
35
25 ns
t_s(DI)
t_h(DI)
t_r
t_f
DIN setup
DIN hold
Rise time
Fall time
10%-90% Rise Time
90%-10% Fall Time
8
8
ns
8
8
ns
8
4 ns
8
4 ns
(1) All timing specifications are measured at characterization but not tested at final test.
7.9 I²S/LJF/RJF Timing in Slave Mode
All specifications at T_A = –40°C to 85°C, IOVDD data sheet limits, V_IL and V_IH applied, V_OL and V_OH measured at datasheet
limits, lumped capacitive load of 20 pF on output pins unless otherwise noted. See Figure 4⁽¹⁾
SYMBOL
PARAMETER
CONDITIONS
IOVDD = 1.8 V IOVDD = 3.3 V
UNIT
MIN MAX MIN MAX
t_H(BCLK)
t_L(BCLK)
t_s(WS)
t_h(WS)
t_d(DO-WS)
t_d(DO-BCLK)
t_s(DI)
t_h(DI)
t_r
t_f
BCLK high period
BCLK low period
(WS)
WCLK hold
WCLK to DOUT delay (For LJF Mode only)
BCLK to DOUT delay
DIN setup
DIN hold
Rise time
Fall time
50% of WCLK to 50% of DOUT
50% of BCLK to 50% of DOUT
10%-90% Rise Time
90%-10% Fall Time
40
30
40
30
8
8
8
8
35
35
8
8
8
8
8
8
ns
ns
ns
ns
25 ns
25 ns
ns
ns
4 ns
4 ns
(1) All timing specifications are measured at characterization but not tested at final test.
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