MSP430F11X_14 Datasheet, PDF (10/34 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F11x
MIXED SIGNAL MICROCONTROLLER
SLAS256D − NOVEMBER 1999 − REVISED SEPTEMBER 2004
digital I/O
There are two 8-bit I/O ports implemented—ports P1 and P2 (only six P2 I/O signals are available on external
pins):
D All individual I/O bits are independently programmable.
D Any combination of input, output, and interrupt conditions is possible.
D Edge-selectable interrupt input capability for all the eight bits of port P1 and six bits of port P2.
D Read/write access to port-control registers is supported by all instructions.
NOTE:
Six bits of port P2, P2.0 to P2.5, are available on external pins − but all control and data bits for port
P2 are implemented.
watchdog timer
The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Input Pin Number
13 - P1.0
9 - P2.1
14 - P1.1
10 - P2.2
15 - P1.2
11 - P2.3
16 - P1.3
Device Input Signal
TACLK
ACLK
SMCLK
INCLK
TA0
TA0
DVSS
DVCC
TA1
TA1
DVSS
DVCC
TA2
ACLK (internal)
DVSS
DVCC
Timer_A3 Signal Connections
Module Input Name Module Block
TACLK
ACLK
SMCLK
Timer
INCLK
CCI0A
CCI0B
GND
CCR0
VCC
CCI1A
CCI1B
GND
CCR1
VCC
CCI2A
CCI2B
GND
CCR2
VCC
Module Output Signal
NA
TA0
TA1
TA2
Output Pin Number
14 - P1.1
18 - P1.5
10 - P2.2
15 - P1.2
19 - P1.6
11 - P2.3
16 - P1.3
20 - P1.7
12 - P2.4
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