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LM3S1162_16 Datasheet, PDF (10/683 Pages) Texas Instruments – Stellaris LM3S1162 Microcontroller
Table of Contents
List of Figures
Figure 1-1.
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Figure 3-1.
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Figure 10-1.
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Figure 13-1.
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Figure 13-7.
Stellaris LM3S1162 Microcontroller High-Level Block Diagram ............................... 42
CPU Block Diagram ............................................................................................. 51
TPIU Block Diagram ............................................................................................ 52
Cortex-M3 Register Set ........................................................................................ 54
Bit-Band Mapping ................................................................................................ 74
Data Storage ....................................................................................................... 75
Vector Table ........................................................................................................ 81
Exception Stack Frame ........................................................................................ 83
SRD Use Example ............................................................................................... 97
JTAG Module Block Diagram .............................................................................. 156
Test Access Port State Machine ......................................................................... 160
IDCODE Register Format ................................................................................... 166
BYPASS Register Format ................................................................................... 166
Boundary Scan Register Format ......................................................................... 167
Basic RST Configuration .................................................................................... 170
External Circuitry to Extend Power-On Reset ....................................................... 171
Reset Circuit Controlled by Switch ...................................................................... 171
Power Architecture ............................................................................................ 173
Main Clock Tree ................................................................................................ 176
Hibernation Module Block Diagram ..................................................................... 235
Clock Source Using Crystal ................................................................................ 237
Clock Source Using Dedicated Oscillator ............................................................. 238
Flash Block Diagram .......................................................................................... 255
GPIO Port Block Diagram ................................................................................... 289
GPIODATA Write Example ................................................................................. 290
GPIODATA Read Example ................................................................................. 290
GPTM Module Block Diagram ............................................................................ 331
16-Bit Input Edge Count Mode Example .............................................................. 336
16-Bit Input Edge Time Mode Example ............................................................... 337
16-Bit PWM Mode Example ................................................................................ 338
WDT Module Block Diagram .............................................................................. 368
ADC Module Block Diagram ............................................................................... 392
Differential Sampling Range, VIN_ODD = 1.5 V ...................................................... 396
Differential Sampling Range, VIN_ODD = 0.75 V .................................................... 396
Differential Sampling Range, VIN_ODD = 2.25 V .................................................... 397
Internal Temperature Sensor Characteristic ......................................................... 398
UART Module Block Diagram ............................................................................. 429
UART Character Frame ..................................................................................... 431
IrDA Data Modulation ......................................................................................... 433
SSI Module Block Diagram ................................................................................. 471
TI Synchronous Serial Frame Format (Single Transfer) ........................................ 474
TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 475
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 476
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 476
Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 477
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 478
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July 15, 2014
Texas Instruments-Production Data