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TPS65917-Q1_17 Datasheet, PDF (1/87 Pages) Texas Instruments – Power Management Unit (PMU) for Processor | |||
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TPS65917-Q1
SLVSCO4C â JULY 2015 â REVISED MARCH 2017
TPS65917-Q1 Power Management Unit (PMU) for Processor
1 Device Overview
1.1 Features
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⢠Qualified for Automotive Applications
⢠AEC-Q100 Qualified With the Following Results:
â Device Temperature Grade 2: â40°C to +105°C
Ambient Operating Temperature Range
â Device HBM Classification Level 2
â Device CDM Classification Level C4B
⢠System Voltage Range from 3.135 V to 5.25 V
⢠Low-Power Consumption
â 20 μA in Off Mode
â 90 μA in Sleep Mode With Two SMPSs Active
⢠Five Step-Down Switched-Mode Power Supply
(SMPS) Regulators:
â 0.7- to 3.3-V Output Range in 10- or 20-mV
Steps
â Two SMPS Regulators With 3.5-A Capability,
With the Ability to Combine into 7-A Output in
Dual-Phase Configuration, With Differential
Remote Sensing (Output and Ground)
â Three Other SMPS Regulators with 3-A, 2-A,
and 1.5-A Capabilities
â Dynamic Voltage Scaling (DVS) Control and
Output Current Measurement in 3.5-A and 3-A
SMPS Regulators
â Hardware and Software Controlled Eco-modeâ¢
Supplying up to 5 mA
â Short-Circuit Protection
â Power-Good Indication (Voltage and
Overcurrent Indication)
â Internal Soft-Start for In-Rush Current Limitation
â Ability to Synchronize to External Clock between
1.7 MHz and 2.7 MHz
⢠Five Low-Dropout (LDO) Linear Regulators:
â 0 .9- to 3.3-V Output Range in 50-mV steps
â Two With 300-mA Capability and Bypass Mode
â One With 100-mA Capability and Capable of
Low-Noise Performance up to 50 mA
â Two Other LDOs With 200-mA Current
Capability
â Short-Circuit Protection
⢠12-Bit Sigma-Delta General-Purpose ADC
(GPADC) With 8 Input Channels (2 external)
⢠Thermal Monitoring With High Temperature
Warning and Thermal Shutdown
⢠Power Sequence Control:
â Configurable Power-Up and Power-Down
Sequences (OTP)
â Configurable Sequences Between the SLEEP
and ACTIVE State Transition (OTP)
â Three Digital Output Signals that can be
Included in the Startup Sequence
⢠Selectable Control Interface:
â One SPI for Resource Configurations and DVS
Control
â Two I2C Interfaces.
â One Dedicated for DVS Control
â One General Purpose I2C Interface for
Resource Configuration and DVS Control
⢠OTP Bit-Integrity Error Detection With Options to
Proceed or Hold Power-Up Sequence and
RESET_OUT Release
⢠Package Option:
â 7-mm à 7-mm 48-pin VQFN With 0.5-mm Pitch
1.2 Applications
⢠Automotive Digital Cluster
⢠Automotive Advanced Driver Assistance System
(ADAS)
⢠Automotive Navigation Systems
1.3 Description
The TPS65917-Q1 PMIC integrates five configurable step-down converters with up to 3.5 A of output
current to power the processor core, memory, I/O, and preregulation of LDOs The device is AEC-Q100
qualified. The step-down converters are synchronized to an internal 2.2-MHz clock to improve EMC
performance of the device. The GPIO_3 pin allows the step-down converters to synchronize to an external
clock, allowing multiple devices to synchronize to the same clock which improves system-level EMC
performance. The device also contains five LDOs to power low-current or low-noise domains.
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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