TMS28F002AEB Datasheet, PDF (1/79 Pages) Texas Instruments – AUTO-SELECT BOOT-BLOCK FLASH MEMORIES

TMS28F002Axy, TMS28F200Axy
262144 BY 8-BIT/131072 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS826D – JANUARY 1996 – REVISED SEPTEMBER 1997
D Organization . . . 262144 by 8 bit s
131 072 by 16 bits
D Array-Blocking Architecture
– One 16K-Byte Protected Boot Block
– Two 8K-Byte Parameter Blocks
– One 96K-Byte Main Block
– One 128K-Byte Main Block
– Top or Bottom Boot Locations
D ’28F200Axy Offers a User-Defined 8-Bit
(Byte) or 16-Bit (Word) Organization
D ’28F002Axy Offers Only the 8-Bit (Byte)
Organization
D Maximum Access / Minimum Cycle Time
" " ^{– Commercial and Extended}
5-V V_CC 10% or 3.3-V V_CC 0.3 V
5 V 3.3 V
’28F002Axy/200Axy60 60 ns 110 ns
’28F002Axy/200Axy70 70 ns 130 ns
’28F002Axy/200Axy80 80 ns 150 ns
" – Automotive
5-V V_CC 10%
’28F200Axy70
70 ns
’28F200Axy80
80 ns
’28F200Axy90
90 ns
(x = S, E, F, Z, or M Depending on V_CC/V_PP
Voltage Configuration)
(y = T for Top or B for Bottom Boot-Block
Configuration)
D 100000- and 10 000-Program/ Erase-Cycle
Versions
D Three Temperature Ranges
– Commercial . . . 0°C to 70°C
– Extended . . . – 40°C to 85°C
– Automotive . . . – 40°C to 125°C
D Industry Standard Packages Offered in
– 40-pin Thin Small-Outline Package
(TSOP)
– 44-pin Plastic Small-Outline Package
(PSOP)
– 48-pin TSOP
D Low Power Dissipation ( V_CC = 5.5 V )
– Active Read . . . 330 mW ( Byte-Read)
– Active Write . . . 248 mW ( Byte-Write)
– Active Read . . . 330 mW ( Word-Read)
– Active Write . . . 248 mW ( Word-Write)
– Block-Erase . . . 165 mW
– Standby . . . 0.72 mW (CMOS-Input
Levels)
DBJ PACKAGE
( TOP VIEW )
V_PP 1
DU/WP 2
NC 3
A7 4
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
E 12
V_SS 13
G 14
DQ0 15
DQ8 16
DQ1 17
DQ9 18
DQ2 19
DQ10 20
DQ3 21
DQ11 22
44 RP
43 W
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 V_SS
31 DQ15/A _–1
30 DQ7
29 DQ14
28 DQ6
27 DQ13
26 DQ5
25 DQ12
24 DQ4
23 V_CC
PIN NOMENCLATURE
A0 – A16 Address Inputs
A17
Address Input (40-Pin Package Only)
BYTE
Byte-Enable
DQ0 – DQ14 Data In / Out
DQ15/A _–1 Data In / Out (Word-Wide Mode),
Low-Order Address (Byte-Wide Mode)
E
Chip-Enable
G
Output-Enable
NC
No Internal Connection
RP
Reset / Deep Power-Down
VCC
VPP
VSS
W
Power Supply
Power Supply for Program / Erase
Ground
Write-Enable
DU/WP
Do Not Use for AMy or AZy/Write-Protect
D Fully Automated On-Chip Erase and
Word / Byte Program Operations
D Write-Protection for Boot Block
D Industry Standard Command-State Machine
(CSM)
– Erase Suspend/Resume
– Algorithm-Selection Identifier
D Five Different Combinations of Supply
Voltages Offered
D All Inputs / Outputs TTL-Compatible
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
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