SN74HC109NSR Datasheet, PDF (1/19 Pages) Texas Instruments – DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

D Wide Operating Voltage Range of 2 V to 6 V
D Low Input Current of 1 µA Max
D High-Current Outputs Drive Up To
10 LSTTL Loads
SN54HC109 . . . J OR W PACKAGE
SN74HC109 . . . D, N, OR NS PACKAGE
(TOP VIEW)
1CLR 1
1J 2
1K 3
1CLK 4
1PRE 5
1Q 6
1Q 7
GND ⁸
16 V_CC
15 2CLR
14 2J
13 2K
12 2CLK
11 2PRE
10 2Q
9 _2Q
SN54HC109, SN74HC109
DUAL JĆK POSITIVEĆEDGEĆTRIGGERED
FLIPĆFLOPS WITH CLEAR AND PRESET
SCLS470A − MARCH 2003 − REVISED OCTOBER 2003
D Low Power Consumption, 40-µA Max I_CC
D Typical t_pd = 12 ns
D ±4-mA Output Drive at 5 V
SN54HC109 . . . FK PACKAGE
(TOP VIEW)
1K
1CLK
NC
1PRE
1Q
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2J
2K
NC
2CLK
2PRE
NC − No internal connection
description/ordering information
These devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset (PRE)
or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR
are inactive (high), data at the J and K inputs meeting the setup-time requirements are transferred to the outputs
on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not related
directly to the rise time of the clock pulse. Following the hold-time interval, data at the J and K inputs can be
changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by
grounding K and tying J high. They also can perform as D-type flip-flops if J and K are tied together.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube of 25
SN74HC109N
SN74HC109N
Tube of 40
SN74HC109D
−40°C to 85°C SOIC − D
Reel of 2500
Reel of 250
SN74HC109DR
SN74HC109DT
HC109
SOP − NS
Reel of 2000 SN74HC109NSR
HC109
CDIP − J
Tube of 25
SNJ54HC109J
SNJ54HC109J
−55°C to 125°C CFP − W
Tube of 150
SNJ54HC109W
SNJ54HC109W
LCCC − FK
Tube of 55
SNJ54HC109FK
SNJ54HC109FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are}
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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