SN74AUP1G08-Q1 Datasheet, PDF (1/15 Pages) Texas Instruments – Low-Power Single 2-Input Positive-AND Gate

SN74AUP1G08-Q1
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Low-Power Single 2-Input Positive-AND Gate
Check for Samples: SN74AUP1G08-Q1
SCES847 – DECEMBER 2012
FEATURES
1
•2 AEC-Q100 Qualified with the Following
Results:
– Device Temperature Grade 1: –40°C to
125°C Ambient Operating Temperature
Range
– Device HBM ESD Classification Level H2
– Device CDM ESD Classification Level C3B
• Available in the Texas Instruments NanoStar™
Package
• Low Static-Power Consumption:
I_CC = 0.9 μA Max
• Low Dynamic-Power Consumption:
C_pd = 4.3 pF Typ at 3.3 V
• Low Input Capacitance: C_i = 1.5 pF Typ
• Low Noise: Overshoot and Undershoot
< 10% of V_CC
• I_off Supports Partial-Power-Down Mode
Operation
• Schmitt-Trigger Action Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input (V_hys = 250 mV, Typ at
3.3 V)
• Wide Operating V_CC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V Input/Output (I/O) Tolerant to Support
Mixed-Mode Signal Operation
• t_pd = 4.3 ns Max at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD-78, Class II
DCK PACKAGE
(TOP VIEW)
A
1
5
V_CC
B
2
GND 3
4Y
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated