SN74ALVCHR16601VR Datasheet, PDF (1/14 Pages) Texas Instruments – 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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FEATURES
• Member of the Texas Instruments Widebus™
Family
• UBT™ Transceiver Combines D-Type Latches
and D-Type Flip-Flops for Operation in
Transparent, Latched, or Clocked Modes
• Operates From 1.65 V to 3.6 V
• Max t_pd of 4.4 ns at 3.3 V
• ±12-mA Output Drive at 3.3 V
• Outputs Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
This 18-bit universal bus transceiver is designed for
1.65-V to 3.6-V V_CC operation.
The SN74ALVCHR16601 combines D-type latches
and D-type flip-flops to allow data flow in transparent,
latched, clocked, and clock-enabled modes.
Data flow in each direction is controlled by
output-enable (OEAB and OEBA), latch-enable
(LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the
clock-enable (CLKENAB and CLKENBA) inputs. For
A-to-B data flow, the device operates in the
transparent mode when LEAB is high. When LEAB is
low, the A data is latched if CLKAB is held at a high
or low logic level. If LEAB is low, the A data is stored
in the latch/flip-flop on the low-to-high transition of
CLKAB. When OEAB is low, the outputs are active.
When OEAB is high, the outputs are in the
high-impedance state.
SN74ALVCHR16601
18-BIT UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES123I – SEPTEMBER 1997 – REVISED SEPTEMBER 2004
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
OEAB 1
LEAB 2
A1 3
GND 4
A2 5
A3 6
V_CC 7
A4 8
A5 9
A6 10
GND 11
A7 12
A8 13
A9 14
A10 15
A11 16
A12 17
GND 18
A13 19
A14 20
A15 21
V_CC 22
A16 23
A17 24
GND 25
A18 26
OEBA 27
LEBA 28
56 CLKENAB
55 CLKAB
54 B1
53 GND
52 B2
51 B3
50 V_CC
49 B4
48 B5
47 B6
46 GND
45 B7
44 B8
43 B9
42 B10
41 B11
40 B12
39 GND
38 B13
37 B14
36 B15
35 V_CC
34 B16
33 B17
32 GND
31 B18
30 CLKBA
29 CLKENBA
T_A
-40°C to 85°C
SSOP - DL
TSSOP - DGG
TVSOP - DGV
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
Tube
SN74ALVCHR16601DL
Tape and reel
SN74ALVCHR16601LR
Tape and reel
SN74ALVCHR16601GR
Tape and reel
SN74ALVCHR16601VR
TOP-SIDE MARKING
ALVCHR16601
ALVCHR16601
VR601
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, UBT are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2004, Texas Instruments Incorporated