SM320C6202-EP Datasheet, PDF (1/83 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
−40°C to 105°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree^†
D High-Performance Fixed-Point Digital
Signal Processors (DSPs)−SM320C62x
− 5-ns Instruction Cycle Time
− 200-MHz Clock Rate
− Eight 32-Bit Instructions/Cycle
− 1600 MIPS
D VelociTI Advanced Very-Long-Instruction-
Word (VLIW) C62x DSP Core
− Eight Highly Independent Functional
Units:
− Six ALUs (32-/40-Bit)
− Two 16-Bit Multipliers (32-Bit Result)
− Load-Store Architecture With 32 32-Bit
General-Purpose Registers
− Instruction Packing Reduces Code Size
− All Instructions Conditional
D Instruction Set Features
− Byte-Addressable (8-, 16-, 32-Bit Data)
− 8-Bit Overflow Protection
− Saturation
− Bit-Field Extract, Set, Clear
− Bit-Counting
− Normalization
D Four-Channel Bootloading
Direct-Memory-Access (DMA) Controller
With an Auxiliary Channel
D Flexible Phase-Locked-Loop (PLL) Clock
Generator
SM320C6202ĆEP
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS044−JULY 2003
D 3M-Bit On-Chip SRAM
− 2M-Bit Internal Program/Cache
(64K 32-Bit Instructions)
− 1M-Bit Dual-Access Internal Data
(128K Bytes)
− Organized as Two 64K-Byte Blocks for
Improved Concurrency
D 32-Bit External Memory Interface (EMIF)
− Glueless Interface to Synchronous
Memories: SDRAM or SBSRAM
− Glueless Interface to Asynchronous
Memories: SRAM and EPROM
− 52M-Byte Addressable External Memory
Space
D 32-Bit Expansion Bus (XBus)
− Glueless/Low-Glue Interface to Popular
PCI Bridge Chips
− Glueless/Low-Glue Interface to Popular
Synchronous or Asynchronous
Microprocessor Buses
− Master/Slave Functionality
− Glueless Interface to Synchronous FIFOs
and Asynchronous Peripherals
D Three Multichannel Buffered Serial Ports
(McBSPs)
− Direct Interface to T1/E1, MVIP, SCSA
Framers
− ST-Bus-Switching Compatible
− Up to 256 Channels Each
− AC97-Compatible
− Serial-Peripheral Interface (SPI)
Compatible (Motorola)
D Two 32-Bit General-Purpose Timers
D IEEE-1149.1 (JTAG^‡)
Boundary-Scan-Compatible
D 352-Pin BGA Package (GJL)
D 0.18-µm/5-Level Metal Process
− CMOS Technology
D 3.3-V I/Os, 1.8-V Internal
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SM320C62x, VelociTI, and C62x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
Other trademarks are the property of their respective owners.
† _{Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.}
This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this
component beyond specified performance and environmental limits.
‡ _{IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.}
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
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