DS90UB933-Q1 Datasheet, PDF (1/7 Pages) Texas Instruments – FPD-Link III Serializer

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DS90UB933-Q1
SNLS546 – AUGUST 2016
DS90UB933-Q1 FPD-Link III Serializer for 1-MP/60-fps Cameras 10/12 Bits,100 MHz
1 Features
•1 AEC-Q100 Qualified for Automotive Applications
With the Following Results:
– Device Temperature Grade 2: –40°C to
+105°C Ambient Operating Temperature
Range
• 37.5-MHz to 100-MHz Input Pixel Clock Support
• Coaxial or Single Differential Pair Interconnect
• Robust Power-Over-Coaxial (PoC) Operation
• Programmable Data Payload:
– 10-Bit Payload up to 100 MHz
– 12-Bit Payload up to 100 MHz
• Continuous Low Latency Bidirectional Control
Interface Channel with I2C Support at 400 kHz
• Embedded Clock with DC-Balanced Coding to
Support AC-Coupled Interconnects
• Capable of Driving up to 15-m Coaxial or Shielded
Twisted-Pair Cables
• 4 Dedicated General Purpose Input (GPI)/ Output
(GPO)
• 1.8-V, 2.8-V or 3.3-V-Compatible Parallel Inputs
on Serializer
• Single Power Supply at 1.8 V
• ISO 10605 and IEC 61000-4-2 ESD Compliant
2 Applications
• Automotive
– Surround View Systems (SVS)
– Front Cameras (FC)
– Rear View Cameras (RVC)
– Sensor Fusion
– Driver Monitor Cameras (DMS)
– Remote Satellite RADAR Sensors
• Security and Surveillance
• Industrial Machine Vision
3 Description
The DS90UB933-Q1 device offers an FPD-Link III
interface with a high-speed forward channel and a
bidirectional control channel for data transmission
over a single coaxial cable or differential pair. The
DS90UB933-Q1 device incorporates differential
signaling on both the high-speed forward channel and
bidirectional control channel data paths. The
serializer/deserializer pair is targeted for connections
between imagers and video processors in an
electronic control unit (ECU). This device is ideally
suited for driving video data requiring up to 12-bit
pixel depth plus two synchronization signals along
with bidirectional control channel bus.
Using TI’s embedded clock technology allows
transparent full-duplex communication over a single
differential pair, carrying asymmetrical-bidirectional
control channel information. This single serial stream
simplifies transferring a wide data bus over PCB
traces and cable by eliminating the skew problems
between parallel data and clock paths. This
significantly saves system cost by narrowing data
paths that in turn reduce PCB layers, cable width,
and connector size and pins. Internal DC-balanced
encoding/decoding is used to support AC-coupled
interconnects.
Table 1. Device Information⁽¹⁾
PART NUMBER
PACKAGE
DS90UB933-Q1
WQFN (32)
BODY SIZE (NOM)
5.00 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Parallel
Data In
10 or 12
Figure 1. Simplified Schematic
FPD-Link III
Copyright © 2016, Texas Instruments Incorporated
Parallel
Data Out
10 or 12
Megapixel
Imager/Sensor
2
HSYNC,
VSYNC
4
GPO
2
DS90UB933-Q1
Bidirectional
Control Bus Serializer
Bidirectional
Control Channel
DS90UB934-Q1
Deserializer
2
HSYNC,
VSYNC
4
GPIO
2
Bidirectional
Control Bus
DSP, FPGA/
µ -Processor/
ECU
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of
development. Subject to change or discontinuance without notice.