CY74FCT825T_14 Datasheet, PDF (1/14 Pages) Texas Instruments – 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS

D Function, Pinout, and Drive Compatible
With FCT, F Logic, and AM29825
D Reduced V_OH (Typically = 3.3 V) Version of
Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D I_off Supports Partial-Power-Down Mode
Operation
D Matched Rise and Fall Times
D Fully Compatible With TTL Input and
Output Logic Levels
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D 64-mA Output Sink Current
32-mA Output Source Current
D High-Speed Parallel Register With
Positive-Edge-Triggered D-Type Flip-Flops
D Buffered Common Clock-Enable (EN) and
Asynchronous-Clear (CLR) Inputs
D 3-State Outputs
CY74FCT825T
8-BIT BUS-INTERFACE REGISTER
WITH 3-STATE OUTPUTS
SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001
Q PACKAGE
(TOP VIEW)
OE₁ 1
OE₂ 2
D₀ 3
D₁ 4
D₂ 5
D₃ 6
D₄ 7
D₅ 8
D₆ 9
D₇ 10
CLR 11
GND 12
24 V_CC
23 OE₃
22 Y₀
21 Y₁
20 Y₂
19 Y₃
18 Y₄
17 Y₅
16 Y₆
15 Y₇
14 EN
13 CP
description
This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and
provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT825T is an 8-bit
buffered register with all the CY74FCT823T controls, plus multiple enables (OE₁, OE₂, OE₃) to allow multiuser
control of the interface, e.g., CS, DMA, and RD/WR. This device is ideal for use as an output port requiring high
I_OL/I_OH.
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading
at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–40°C to 85°C QSOP – Q Tape and reel
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CY74FCT825CTQCT FCT825C
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2001, Texas Instruments Incorporated
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