ADS5560 Datasheet, PDF (1/61 Pages) Texas Instruments – 16-BIT, 40/80 MSPS ADCs WITH DDR LVDS/CMOS OUTPUTS

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ADS5560, ADS5562
SLWS207B – MAY 2008 – REVISED JANUARY 2016
ADS556x 16-Bit, 40 and 80 MSPS ADCs With DDR LVDS and CMOS Outputs
1 Features
•1 16-Bit Resolution
• Maximum Sample Rate:
– ADS5562: 80 MSPS
– ADS5560: 40 MSPS
• Total Power:
– 865 mW at 80 MSPS
– 674 mW at 40 MSPS
• No Missing Codes
• High SNR: 84 dBFS (3 MHz IF)
• SFDR: 85 dBc (3 MHz IF)
• Low-Frequency Noise Suppression Mode
• Programmable Fine Gain, 1-dB steps Until 6-dB
Maximum Gain
• Double Data-Rate (DDR) LVDS and Parallel
CMOS Output Options
• Internal and External Reference Support
• 3.3-V Analog and Digital Supply
• Pin-for-Pin With ADS5547 Family
• 48-VQFN Package (7.00 mm × 7.00 mm)
Innovative techniques, such as DDR LVDS and an
internal reference that does not require external
decoupling capacitors, have been used to achieve
significant savings in pin count. This innovation
results in a compact 7-mm × 7-mm 48-pin VQFN
package.
The device can be put in an external reference mode,
where the VCM pin behaves as the external
reference input. For applications where power is
important, the ADS556x device offers power down
modes and automatic power scaling at lower sample
rates.
The device is specified over the industrial
temperature range of –40°C to 85°C.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADS5560
ADS5562
VQFN (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Block Diagram
2 Applications
• Medical Imaging, MRI
• Wireless Communications Infrastructure
• Software Defined Radio
• Test and Measurement Instrumentation
• High Definition Video
3 Description
The ADS556x is a high-performance 16-bit family of
ADCs with sampling rates up to 80 MSPS. The
device supports very-high SNR for input frequencies
in the first Nyquist zone. The device includes a low-
frequency noise suppression mode that improves the
noise from DC to about 1 MHz.
In addition to high performance, the device offers
several flexible features such as output interface
(either Double Data Rate [DDR] LVDS or parallel
CMOS) and fine gain in 1-dB steps until 6-dB
maximum gain.
CLKP
CLKM
INP
Sample
and
INM
Hold
VCM
ADS556x
CLOCKGEN
16-Bit ADC
Reference
Digital
Encoder
and
Serializer
Control
Interface
CLKOUTP
CLKOUTM
D0_D1_P
D0_D1_M
D2_D3_P
D2_D3_M
D4_D5_P
D4_D5_M
D6_D7_P
D6_D7_M
D8_D9_P
D8_D9_M
D10_D11_P
D10_D11_M
D12_D13_P
D12_D13_M
D14_D15_P
D14_D15_M
OVR
LVDS INTERFACE
B0095-05
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.