ADC31JB68 Datasheet, PDF (1/74 Pages) Texas Instruments – Single Channel 16-bit 500 Msps Analog to Digital Converter

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ADC31JB68
SLASE60A – SEPTEMBER 2015 – REVISED SEPTEMBER 2015
ADC31JB68 Single Channel 16-bit 500 Msps Analog to Digital Converter
1 Features
•1 Single Channel
• 16-Bit Resolution
• Maximum Clock Rate: 500 Msps
• Small 40-Pin QFN Package (6 x 6 mm)
• Input Buffer Input Bandwidth (3 dB): 1300 MHz
• Aperture Jitter: 80 fs
• On Chip Clock Divider: /1, /2, /4
• On Chip Dither
• Consistent Dynamic Performance Using
Foreground and Background Calibration
• Input Amplitude and Phase Adjustment
• Input Full Scale: 1.7 Vpp
• Power Supplies: 1.2/1.8/3 V
• JESD204B Interface
– Subclass 1 Compliant
– 2 Lanes at 5 Gbps
• Support for Multi-chip Synchronization
• Key Specifications
– Power Dissipation: 915 mW at 500 Msps
– Performance at f_in = 210 MHz at –1 dBFS
– SNR: 69.3 dBFS
– NSD: –153.3 dBFS/Hz
– SFDR: 80 dBc
– Non-HD2,HD3: –91 dBFS
– Performance at fin = 450 MHz at –1 dBFS
– SNR: 67 dBFS
– NSD: –151 dBFS/Hz
– SFDR: 77 dBc HD2,3
– Non-HD2,HD3: –89 dBFS
2 Applications
• High IF Sampling Receivers
• Broadband Wireless
• Microwave Receivers
• Cable CMTS, DOCSIS 3.1 Receivers
• Communications Test Equipment
• Digitizers
• Software Defined Radio (SDR)
• Radar and Antenna Arrays
3 Description
The ADC31JB68 is a low power, wide bandwidth 16-
bit 500 MSPS analog-to-digital converter (ADC). The
buffered analog input provides uniform input
impedance across a wide frequency range while
minimizing sample-and-hold glitch energy. It is
designed to sample input signals of up to 1.3 GHz.
The ADC31JB68 provides excellent spurious-free
dynamic range (SFDR) over a large input frequency
range with very low power consumption. On-chip
dither provides an very clean noise floor. Embedded
foreground and background calibration ensures
consistent performance over the temperature range
and minimizes part to part variation.
It supports the JESD204B serial interface with data
rates up to 5 Gbps on each of 2 lanes, enabling high
system integration density.
The device comes in a 40-pin QFN (6 x 6 mm)
package.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADC31JB68
WQFN (40)
6.00 mm × 6.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
SPACE
Spectrum with -1 dBFS 450 MHz Input
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
0
25 50 75 100 125 150 175 200 225 250
Frequency [MHz]
1
Transmitted Eye at Output of 18-inch, 5-mil. FR4
Microstrip Trace at 5 Gb/s with Optimized De-Emphasis
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.