ADC12D1000RF_15 Datasheet, PDF (1/84 Pages) Texas Instruments – 12-Bit, 3.2-GSPS and 2-GSPS RF-Sampling ADC

Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
ADC12D1000RF, ADC12D1600RF
SNAS519H – JULY 2011 – REVISED AUGUST 2015
ADC12D1x00RF 12-Bit, 3.2-GSPS and 2-GSPS RF-Sampling ADC
1 Device Overview
1.1 Features
1
• Excellent Noise and Linearity up to and Above f_IN =
2.7 GHz
• Configurable to Either 3.2 or 2 GSPS Interleaved
or 1600 or 1000 MSPS Dual ADC
• New DESCLKIQ Mode for High Bandwidth, High
Sampling Rate Apps
• Pin-Compatible With ADC10D1x00, ADC12D1x00
• AutoSync Feature for Multi-Chip Synchronization
• Internally Terminated, Buffered, Differential Analog
Inputs
• Interleaved Timing Automatic and Manual Skew
Adjust
• Test Patterns at Output for System Debug
• Time Stamp Feature to Capture External Trigger
• Programmable Gain, Offset, and t_AD Adjust
Feature
• 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
• Key Specifications
– Resolution 12 Bits
– Interleaved 3.2- and 2-GSPS ADC
• IMD₃ (Fin = 2.7 GHz at –13 dBFS) –63.7/–73
dBFS (Typical)
• IMD₃ (Fin = 2.7 GHz at –16 dBFS) –66.7/–85
dBFS (Typical)
• Noise Floor –154.6/–154 dBm/Hz (Typical)
• Power 3.94/3.42 W (Typical)
– Dual 1600/1000 MSPS ADC, Fin = 498 MHz
• ENOB 9.2/9.4 Bits (Typical)
• SNR 58.2/58.8 dB (Typical)
• SFDR 66.7/71.9 dBc (Typical)
• Power per Channel 1.97/1.71 W (Typical)
1.2 Applications
• 3G/4G Wireless Basestations
– Receive Path
– DPD Path
• Wideband Microwave Backhaul
• RF Sampling Software Defined Radios
• Military Communications
• SIGINT
• RADAR and LIDAR
• Wideband Communications
• Consumer RFs
• Tests and Measurements
1.3 Description
The 12-bit 3.2- and 2-GSPS ADC12D1x00RF is an RF-sampling GSPS ADC that can directly sample
input frequencies up to and above 2.7 GHz. The ADC12D1x00RF augments the very large Nyquist zone
of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable
range beyond the 3^rd Nyquist zone
The ADC12D1x00RF provides a flexible LVDS interface which has multiple SPI programmable options to
facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-
1996 and supports programmable common-mode voltage. The product is packaged in a lead-free 292-ball
thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C.
PART NUMBER
Device Information⁽¹⁾
PACKAGE
ADC12D1000RF
ADC12D1600RF
BGA (40)
(1) For more information, see Section 10, Mechanical Packaging and Orderable Information.
BODY SIZE
27.00 mm × 27.00 mm
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.