ADC07D1520_12 Datasheet, PDF (1/52 Pages) Texas Instruments – Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

ADC07D1520
Low Power, 7-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter
General Description
The ADC07D1520 is a dual, low power, high performance
CMOS analog-to-digital converter. The ADC07D1520 digi-
tizes signals to 7 bits of resolution at sample rates up to 1.5
GSPS. Its features include a test pattern output for system
debug, a clock phase adjust, and selectable output demulti-
plexer modes. This device is guaranteed to have no missing
codes over the full operating temperature range. The unique
folding and interpolating architecture, the fully differential
comparator design, the innovative design of the internal sam-
ple-and-hold amplifier and the self-calibration scheme enable
a very flat response of all dynamic parameters beyond
Nyquist, producing a high 6.8 Effective Number of Bits
(ENOB) with a 748 MHz input signal and a 1.5 GHz sample
rate while providing a 10^-18 Code Error Rate (C.E.R.) Output
formatting is offset binary and the Low Voltage Differential
Signaling (LVDS) digital outputs are compatible with IEEE
1596.3-1996, with the exception of an adjustable common
mode voltage between 0.8V and 1.2V.
Each converter has a selectable output demultiplexer which
feeds two LVDS buses. If the 1:2 Demultiplexed Mode is se-
lected, the output data rate is reduced to half the input sample
rate on each bus. When Non-Demultiplexed Mode is selected,
the output data rate on channels DI and DQ is at the same
rate as the input sample clock. The two converters can be
interleaved and used as a single 3 GSPS ADC.
The converter typically consumes less than 3.5 mW in the
Power Down Mode and is available in a leaded or lead-free,
128-pin, thermally enhanced, exposed pad LQFP and oper-
ates over the Industrial (-40°C ≤ T_A ≤ +85°C) temperature
range.
Ordering Information
Features
● ^{Single +1.9V ±0.1V Operation}
● ^{Interleave Mode for 2x Sample Rate}
● ^{Multiple ADC Synchronization Capability}
● ^{Adjustment of Input Full-Scale Range, Clock Phase, and}
Offset
● ^{Choice of SDR or DDR Output Clocking}
● ^{1:1 or 1:2 Selectable Output Demux}
● ^{Second DCLK Output}
● ^{Duty Cycle Corrected Sample Clock}
● ^{Test pattern}
Key Specifications
● ^Resolution
● ^{Max Conversion Rate}
● ^{Code Error Rate}
● ^{ENOB @ 748 MHz Input}
● ^DNL
● ^{Power Consumption (Non-DES Mode)}
— Operating in 1:2 Demux Mode
— Power Down Mode
7 Bits
1.5 GSPS (max)
10^-18 (typ)
6.8 Bits (typ)
±0.15 LSB (typ)
1.9 W (typ)
2.5 mW (typ)
Applications
● ^{Direct RF Down Conversion}
● ^{Digital Oscilloscopes}
● ^{Satellite Set-top boxes}
● ^{Communications Systems}
● ^{Test Instrumentation}
Industrial Temperature Range (-40°C < T_A < +85°C)
ADC07D1520CIYB/NOPB
NS Package
Lead-free 128-Pin Exposed Pad LQFP
PRODUCTION DATA information is current as of
publication date. Products conform to specifications per
the terms of the Texas Instruments standard warranty.
Production processing does not necessarily include
testing of all parameters.
301941 SLAS881A
Copyright © 1999-2012, Texas Instruments Incorporated