PCI4410 Datasheet, PDF (96/201 Pages) Texas Instruments – PC Card and OHCI Controller

4.43 Power Management Control/Status Register Bridge Support Extensions
The power management control/status register bridge support extensions support PCI-bridge-specific functionality.
See Table 4–18 for a complete description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
Power management control/status register bridge support extensions
Type
R
R/W
R
R
R
R
R
R
Default
1
1
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
Power management control/status register bridge support extensions
Read-only
A6h
C0h
Table 4–18. Power Management Control/Status Register Bridge Support Extensions
BIT
SIGNAL
TYPE
FUNCTION
BPCC_Enable. Bus power/clock control enable. This bit returns 1 when read.
This bit is encoded as:
0 = Bus power/clock control is disabled.
1 = Bus power/clock control is enabled (default).
7
BPCC_EN
R A 0 indicates that the bus power/clock control policies defined in the PCI Bus Power Management
Interface Specification are disabled. When the bus power/clock control enable mechanism is disabled,
the bridge’s power management control/status register power state field (see Section 4.42, bits 1–0)
cannot be used by the system software to control the power or the clock of the bridge’s secondary bus.
A 1 indicates that the bus power/clock control mechanism is enabled.
B2/B3 support for D3hot. The state of this bit determines the action that is to occur as a direct result of
programming the function to D3hot. This bit is only meaningful if bit 7 (BPCC_EN) is a 1. This bit is encoded
6
B2_B3
R/W
as:
0 = When the bridge is programmed to D3hot, its secondary bus will have its power removed (B3).
1 = When the bridge function is programmed to D3hot, its secondary bus’s PCI clock will be
stopped (B2). (Default)
5–0
RSVD
R Reserved. Bits 5–0 return 0s when read.
4.44 Power Management Data Register
The power management data register returns 0s when read, because the CardBus functions do not report dynamic
data.
Bit
7
6
5
4
3
2
1
0
Name
Power management data
Type
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
Power management data
Read-only
A7h
00h
4–30