AM3517 Datasheet, PDF (92/184 Pages) Texas Instruments – ARM Microprocessor

AM3517/05 ARM Microprocessor
SPRS550 – OCTOBER 2009
www.ti.com
gpmc_clk
gpmc_ncsx
gpmc_a[26:17]
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_nwe
gpmc_d[15:0]
gpmc_waitx
F1
F1
F0
F2
F3
F4
Address (MSB)
F17
F6
F17
F17
F17
F17
F17
F6
F8 F8
F9
F14
F14
Address (LSB)
F15 F15 F15
D0
D1 D2
D3
gpmc_io_dir
OUT
In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.
Figure 6-6. GPMC/Multiplexed NOR Flash Synchronous Burst Write
030-025
6.4.1.2 GPMC/NOR Flash Interface Asynchronous Timing
Table 6-7 and Table 6-8 assume testing over the recommended operating conditions (see Figure 6-7
through Figure 6-12) and electrical characteristic conditions.
Table 6-5. GPMC/NOR Flash Asynchronous Mode Timing Conditions
TIMING CONDITION PARAMETER
Input Conditions
t_R
t_F
Output Conditions
Input signal rise time
Input signal fall time
C_LOAD
Output load capacitance
VALUE
1.8
1.8
15.94
UNIT
ns
ns
pF
Table 6-6. GPMC/NOR Flash Interface Asynchronous Timing – Internal Parameters⁽¹⁾⁽²⁾
NO.
PARAMETER
FI1 Maximum output data generation delay from internal
functional clock
FI2 Maximum input data capture delay by internal
functional clock
FI3 Maximum device select generation delay from internal
functional clock
1.8V
MIN
MAX
6.5
4
6.5
1.0 V
MIN
MAX
9.1
5.6
9.1
0.9 V
MIN
MAX
13.7
8.1
13.7
UNIT
ns
ns
ns
(1) The internal parameters table must be used to calculate Data Access Time stored in the corresponding CS register bit field.
(2) Internal parameters are referred to the GPMC functional internal clock which is not provided externally.
92
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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