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TMS370C736AFNT Datasheet, PDF (9/49 Pages) Texas Instruments – 8-BIT MICROCONTROLLER | |||
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TMS370Cx36
8-BIT MICROCONTROLLER
SPNS039B â JANUARY 1996 â REVISED FEBRUARY 1997
standby RAM module
The 256 byte standby RAM is general-purpose and powered through a separate VCCSTBY pin. The data stored
in this memory is protected against power failures on the main VCC1 pins.
The standby RAM data is saved if the power failure on the main VCC1 pins is detected externally and an external
reset is generated when VCC1 falls below 4.3 V (see Figure 4). The external reset must remain low during the
entire power failures. The falling edge of the reset signal is internally detected to set the standby RAM in
low-power HALT mode. After the next power up, the RESET pin must be pulled high to get out of the HALT mode
of the standby RAM. In halt mode, the standby RAM consumes only leakage current.
4.3 Volt
VCC1
RESET
Standby RAM Locked in Halt Mode
Figure 4. Standby RAM Locked in Halt Mode
peripheral file (PF)
The TMS370Cx36 control registers contain all the registers necessary to operate the system and peripheral
modules on the device. The instruction set includes some instructions that access the PF directly. These
instructions designate the register by the number of the PF relative to 1000h, preceded by P0 for a hexadecimal
designator or P for a decimal designator. For example, the system-control register 0 (SCCR0) is located at
address 1010h; its peripheral file hexadecimal designator is P010, and its decimal designator is P16. Table 4
lists the TMS370Cx36 PF address map.
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ ADDRESS RANGE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1000hâ100Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1010hâ101Fh
1020h â 102Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1030hâ103Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1040hâ104Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1050hâ106Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1070hâ107Fh
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1080hâ10FFh
Table 4. TMS370Cx36 Peripheral File Address Map
PERIPHERAL FILE
DESIGNATOR
P000 â P00F
P010 â P01F
P020 â P02F
P030 â P03F
P040 â P04F
P050 â P06F
P070 â P07F
P080 â P0FF
DESCRIPTION
Reserved
System and EPROM / EEPROM control registers
Digital I / O port control registers
SPI registers
PACT registers
Reserved
Analog-to-digital converter 1 registers
Reserved
⢠POST OFFICE BOX 1443 HOUSTON, TEXAS 77251â1443
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