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TLC555-Q1 Datasheet, PDF (9/13 Pages) Texas Instruments – LinCMOS™ TIMER
www.ti.com
APPLICATION INFORMATION
TLC555-Q1
LinCMOS™ TIMER
SLFS078 – OCTOBER 2006
0.1 µF
RA
0.1 µF
VDD
5
8
CONT
4 RESET
VDD
RL
2/3 VDD
7
TLC555
DISCH
3 Output
RB
6
OUT
THRES
CL
1/3 VDD
2 TRIG
GND
CT
1
GND
tc(H)
tPHL
tc(L)
tPLH
CIRCUIT
TRIGGER AND THRESHOLD VOLTAGE WAVEFORM
Figure 3. Astable Operation
Connecting TRIG to THRES, as shown in Figure 3, causes the timer to run as a multivibrator. The capacitor CT
charges through RA and RB to the threshold voltage level (approximately 0.67 VDD) and then discharges through
RB only to the value of the trigger voltage level (approximately 0.33 VDD). The output is high during the charging
cycle (tc(H)) and low during the discharge cycle (tc(L)). The duty cycle is controlled by the values of RA, RB, and CT
as shown in the following equations.
tc(H) [ CT (RA ) RB) In 2 (In 2 + 0.693)
tc(L) [ CT RB In 2
Period + tc(H) ) tc(L) [ CT (RA ) 2RB) In 2
Output driver duty cycle
+
tc(L)
tc(H) ) tc(L)
[
1–
RA
RB
) 2RB
Output waveform duty cycle
+
tc(H)
tc(H) ) tc(L)
[
RA
RB
) 2RB
The 0.1-µF capacitor at CONT in Figure 3 decreases the period by about 10%.
The formulas shown above do not allow for any propagation delay times from the TRIG and THRES inputs to
DISCH. These delay times add directly to the period and create differences between calculated and actual
values that increase with frequency. In addition, the internal on-state resistance (ron) during discharge adds to RB
to provide another source of timing error in the calculation when RB is very low or ron is very high.
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