SN54GTL16622A Datasheet, PDF (9/10 Pages) Texas Instruments – 18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVERS

From Output
Under Test
CL = 50 pF
(see Note A)
SN54GTL16622A, SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS
SCBS673D – AUGUST 1996 – REVISED DECEMBER 1999
PARAMETER MEASUREMENT INFORMATION
500 Ω ^S1
500 Ω
6V
Open
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
6V
GND
VTT
From Output
Under Test
CL = 30 pF
(see Note A)
25 Ω
Test
Point
LOAD CIRCUIT FOR A OUTPUTS
LOAD CIRCUIT FOR B OUTPUTS
Input
tw
1.5 V
3V
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Input
(see Note B)
1.5 V
3V
1.5 V
0V
tPLH
Output
VREF
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(CLKAB to B port)
tPHL
VOH
VREF
VOL
Input
(see Note B)
1.5 V
3V
1.5 V
0V
tPLH
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(CLKBA to A port)
tPHL
VOH
1.5 V
VOL
Timing
Input
Data Input
A Port
Data Input
B Port
3V
1.5 V
0V
tsu
1.5 V
th
3V
1.5 V
0V
VREF
VTT
VREF
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(see Note B)
Output
Waveform 1
S1 at 6 V
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
3V
1.5 V
1.5 V
0V
tPZL
tPLZ
1.5 V
3V
VOL + 0.3 V
VOL
tPZH
tPHZ
1.5 V
VOH
VOH – 0.3 V
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(OEBA to A port)
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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