SN54GTL16622A Datasheet, PDF (8/10 Pages) Texas Instruments – 18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVERS

SN54GTL16622A, SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS
SCBS673D – AUGUST 1996 – REVISED DECEMBER 1999
timing requirements over recommended ranges of supply voltage and operating free-air
temperature for GTL+ (unless otherwise noted)
fclock Clock frequency
tw
Pulse duration, CLK high or low
tsu
Setup time
th
Hold time
Data before CLK↑
CE before CLK↑
Data after CLK↑
CE after CLK↑
SN54GTL16622A SN74GTL16622A
MIN MAX
MIN MAX
200
200
2.5
2.5
2.5
2.4
3.4
3.2
0.3
0.2
0.1
0
UNIT
MHz
ns
ns
ns
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature for GTL+ (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
fmax
tPLH
tPHL
tPLH
tPHL
Slew rate
CLKAB
B
OEAB
B
Both transitions (B port)
tr
Transition time, B outputs (0.6 V to 1.3 V)
tf
Transition time, B outputs (1.3 V to 0.6 V)
tPLH
CLKBA
A
tPHL
ten
OEBA
A
tdis
† _{All typical values are at VCC = 3.3 V, TA = 25°C.}
SN54GTL16622A
MIN TYP† MAX
200
2.5
5.8
2.2
6.1
2.3
5.5
1.7
5.3
0.5
0.9
2.8
0.4
3.7
1.9
5.5
1.8
5.3
1.8
5.3
2
5.8
SN74GTL16622A
MIN TYP† MAX
200
2.6
4 5.6
2.3
4 5.7
2.4 3.8 5.2
1.8 3.4
5
0.5
1 1.6 2.7
0.5 1.1 3.2
2 3.8 5.3
1.9 3.6
5
1.9 3.6
5
2.1
4 5.5
UNIT
MHz
ns
ns
V/ns
ns
ns
ns
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
8
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265