PT7681 Datasheet, PDF (9/12 Pages) Texas Instruments – 30-A Programmable ISR With Margin Up/Down Controls

Application Notes
PT7680 Series
Using the Up/Down Margin Adjust Controls on the
PT7680 Series of 30-A Regulators
The PT7680 series of integrated switching regulator
modules incorporate MARGUP (pin 27) and MARGDN
(pin 6) control inputs. These controls allow the output
voltage set point to be momentarily adjusted ¹, either
up or down, by a nominal 5%. The adjustment is in-
dependent of the VID control inputs and provides a
convenient method for dynamically testing the load
circuit’s power supply voltage over its operating margin
or range. The 5% adjustment is made by driving the
appropriate margin control input to the ground reference
at Sense(-) (pin 12) ². An open drain, low-leakage (<1µA),
logic-level MOSFET or p-channel JFET is recommended
for this purpose. Adjustments of less than 5% are also
possible using a series resistor (See Figure 5.1). The value
of the resistor can be selected from Table 5.1, or calcu-
lated using the following formulas.
Resistor Value Calculation
To reduce the margin adjustment to a value less than 5%,
series padding resistors are required (See R_D and R_U in
Figure 5.1). For the same amount of adjustment, the
resistor value calculated for R_U and R_D will be different.
R_U
=
100 ( 6 – 1.2 . %)
.%
k.
R_D
=
4.99 (100 – . %)
.%
–94.81
k.
Where: . % = The required margin adjust in percent
Notes:
1. The MARGUP and MARGDN controls were not
intended to be activated simultaneously. If they are
their affects on the output voltage may not completely
cancel, resulting in a slight shift in the output voltage
set point.
2. When possible use the Sense(-) (pin 12) as the ground
reference. This will produce a more accurate adjustment
of the output voltage at the load circuit terminals. GND
(pins 13-19) can be used if the Sense(-) pin is connected to
GND near the regulator.
Table 5.1; Margin Up/Down Adjust Resistor Values
PADDING RESISTOR VALUES
% Adjust RU (Margin Up) RD (Margin Dn)
5
0.0k.
0.0k. (No resistor)
4
30.0k.
24.9k.
3
80.0k.
66.5k.
2
180.0k.
150.0k.
1
480.0k.
399.0k.
Figure 5.1; Margin Up/Down Application Schematic
+5V
4321
VID3 - VID0
26
SNS(+)
+V_o
0V
7–11
V_IN
STBY
5
PT7681
20–25
V_OUT
GND
13–19
MARG
DN
6
MARG
UP
27
SNS(–)
12
+V_OUT
+
C_in
Margin Dn
Margin Up
R_D
R_U
+
C_out
L
Q₁
O
A
D
Q₂
Sense(–)
PWR GND
Power GND
0V
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