DRV8801A-Q1_15 Datasheet, PDF (9/24 Pages) Texas Instruments – DRV8801A-Q1 DMOS Full-Bridge Motor Drivers

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DRV8801A-Q1
SLVSC79A – JUNE 2014 – REVISED SEPTEMBER 2014
7.3 Feature Description
7.3.1 Power Supervisor
The control input, nSLEEP, is used to minimize power consumption when the DRV8801A-Q1 device is not in
use. The nSLEEP input disables much of the internal circuitry, including the internal voltage rails and charge
pump. nSLEEP is asserted logic low. A logic high on this input pin results in normal operation. When switching
from low to high, the user should allow a 1-ms delay before applying PWM signals. This time is needed for the
charge pump to stabilize.
7.3.2 Bridge Control
The following table shows the logic for the DRV8801A-Q1:
nSLEEP
0
1
1
1
1
PHASE
X
0
1
0
1
1
X
ENABLE
X
1
1
0
0
0
MODE1
X
X
X
0
0
1
1
X
0
1
MODE2
X
X
X
X
X
0
1
OUTA
Z
L
H
H
L
L
H
OUTB
Z
H
L
L
H
L
H
OPERATION
Sleep mode
Reverse
Forward
Fast decay
Fast decay
Low-side Slow
decay
High-side Slow
decay
To prevent reversal of current during fast-decay synchronous rectification, outputs go to the high impedance
state as the current approaches 0 A.
The path of current flow for each of the states in the above logic table is shown in Figure 4.
7.3.2.1 MODE 1
Input MODE 1 is used to toggle between fast-decay mode and slow-decay mode. A logic high puts the device in
slow-decay mode.
7.3.2.2 MODE 2
MODE 2 is used to select which set of drivers (high side versus low side) is used during the slow-decay
recirculation. MODE 2 is meaningful only when MODE 1 is asserted high. A logic high on MODE 2 has current
recirculation through the high-side drivers. A logic low has current recirculation through the low-side drivers.
7.3.3 Fast Decay with Synchronous Rectification
This decay mode is equivalent to a phase change where the FETs opposite of the driving FETs are switched on
(2 in Figure 4). When in fast decay, the motor current is not allowed to go negative because this would cause a
change in direction. Instead, as the current approaches zero, the drivers turn off. See the Power Dissipation
section for an equation to calculate power.
7.3.4 Slow Decay with Synchronous Rectification (Brake Mode)
In slow-decay mode, both low-side and high-side drivers turn on, allowing the current to circulate through the
low-side and high-side body diodes of the H-bridge and the load (3 and 4 in Figure 4). See the Power Dissipation
section for equations to calculate power for both high-side and low-side slow decay.
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