BQ2016 Datasheet, PDF (9/21 Pages) Texas Instruments – GAS GAUGE IC FOR HIGH DISCHARGE RATES

bq2016
GAS GAUGE IC FOR
HIGH DISCHARGE RATES
SLUS475A– JANUARY 2001 – REVISED NOVEMBER 2002
main gas gauge registers (continued)
NAC calibration
The bq2016 sets NAC to 85% of LMD when it detects a transition from fast-charge to a trickle charge provided
that 85% ≥ NAC > 80% of LMD when the bq2016 detects the transition. For this determination, fast-charge
detection (FCDT) corresponds to the FCDT value set by the PROG pin. Fast-charge detection occurs when the
FCDT condition is met for 30s after the CHGS bit is set in FLGS1. Once fast-charge activity is qualified, a
transition of the SRC signal below the FCDT threshold enables trickle-charge detection. The bq2016 verifies
trickle charge by continuing to sample the SRC input for signals above the trickle-charge threshold and below
the fast-charge threshold. This sampling can take up to 3 minutes. Once a trickle-charge is verified, the bq2016
adjusts NAC up to 85% of LMD if NAC was between 80% and 85% of LMD. If NAC was greater then 85% of
LMD, NAC is unchanged upon transition detection.
last measured discharge (LMD)
Last measured discharge is the most recent measured discharge capacity of the battery. On initialization, the
bq2016 sets LMD = PFC. When a valid charge is detected following a valid discharge, the bq2016 updates LMD
with the current value in DCR. During subsequent discharges, the bq2016 updates LMD with the current value
in DCR. (The DCR value represents the measured discharge capacity of the battery from full to the EDV
threshold.) The bq2016 limits the adjustment of LMD down to 75% of its previous value. A qualified discharge
is necessary for a capacity transfer from DCR to the LMD register. The LMD register also serves as the 100%
reference threshold used by the display mode.
discharge count register (DCR)
The discharge count register (DCR) is used to update the last measured discharge register only if a complete
battery discharge from full to empty occurs without any partial battery charges. In this way, the bq2016 adapts
its capacity determination based on the actual conditions of discharge.
The DCR counts up during discharge independent of NAC and can continue to increase after NAC decrements
to 0. Before NAC = 0 (empty battery), both discharge and self-discharge increment the DCR. After NAC = 0,
only discharge increments the DCR. The DCR resets to 0 when the VDQ bit in the primary status flags register
(FLAGS1) is set on charge. The bq2016 sets VDQ=1 on a fast charge-to-trickle detection if NAC is greater than
80% of LMD or when NAC=LMD. The DCR does not roll over but stops counting when it reaches ffffh. The DCR
value becomes the new LMD value on the first valid charge after a discharge to EDV threshold if the bq2016
detects a qualified discharge. A valid charge is a minimum of one (maximum of two) NAC increments. A qualified
discharge occurs if
D No valid charge initiations occurred during the period between when VDQ gets set on charge and when the
bq2016 detects EDV on discharge.
D The self-discharge count is not more than 10% of PFC.
D The temperature is greater than or equal to 0°C when the EDV level is reached during discharge.
D The EDV bit gets set.
The VDQ bit set to a one indicates whether the present discharge is valid for LMD update.
programming the bq2016
The bq2016 is programmed with the VPFC and the PROG pins. During power-up or initialization, the bq2016
reads the state of these multilevel inputs and latches in the programmable configuration settings. Resistor
divider networks for VPFC and PROG should target the nominal thresholds as defined in the programming
tables.
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