BQ2016 Datasheet, PDF (15/21 Pages) Texas Instruments – GAS GAUGE IC FOR HIGH DISCHARGE RATES

bq2016
GAS GAUGE IC FOR
HIGH DISCHARGE RATES
SLUS475A– JANUARY 2001 – REVISED NOVEMBER 2002
communicating with the bq2016 (continued)
The return-to-one data bit frame consists of three distinct sections. The first section is used to start the
transmission by either the host or the bq2016 taking the HDQ pin to a logic-low state for a period t_STRH;B. The
next section is the actual data transmission, where the data should be valid by a period t_DSU;B, after the negative
edge used to start communication. The data should be held for a period t_DH;DV, to allow the host or bq2016 to
sample the data bit.
The final section is used to stop the transmission by returning the HDQ pin to a logic-high state by at least a
period t_SSU;B, after the negative edge used to start communication. The final logic-high state should continue
during a period t_CYCH;B, to allow time to ensure that the bit transmission was stopped properly. The timings for
data and break communication are given in the serial communication timing specification and illustration
sections.
In communication with the bq2016 the least-significant bit is always transmitted first.
command code and registers
The bq2016 status registers are listed in Table 9 and are described below.
command code
The bq2016 latches the command code when eight valid command bits have been received by the bq2016. The
command code contains two fields:
D W/R bit
D Command address
The W/R bit of the command code determines whether the received command is for a read or a write function.
command code (continued)
W/R is:
0 The bq2016 outputs the requested register contents specified by the address portion of command code.
1 The host writes to the register specified by the address portion of the command code.
The lower seven-bit field of the command code contains the address portion of the register to be accessed. The
bq2016 ignores writes to invalid addresses.
registers
FLAGS1 (0x01) – Primary Status Flags
The FLAGS1 register provides bq2016 status information. The 8-bit register includes the following status bits:
7
6
5
4
3
2
1
0
CHGS BRP MCV
CI
VDQ RSVD EDV OCE
CHGS
The bq2016 set the CHGS bit when it detects charge activity. The bq2016 clears the CHGS bit on discharge.
Bit = Condition
0 The bq2016 detects discharge.
1 The bq2016 detects charge.
BRP
The bq2016 sets the BRP bit when it performs a full reset.
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