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TVP5031 Datasheet, PDF (80/85 Pages) Texas Instruments – NTSC/PAL VIDEO DECODER
3.3.6 Parallel Host Interface B
A[0:1ÎÎ] ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
CS (VC3)
WR (VC1)
RD (VC2)
t1
t11
t10
t3
t6
t2
t7
RDY (VC0)
t4
WDR[7IT:0EÎÎ] ÎÎÎÎÎÎÎÎÎÎÎÎ
D[7:0]
READ
Write Data
ÎÎÎÎÎÎt8 ÎÎÎ
t5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
t9
Read Data
Figure 3–2. Parallel Host Interface B Timing
PARAMETER
t1
Delay VC1 or VC2 active after valid A[1:0]
t2
A[1:0] hold after VC1 or VC2 inactive
t3
Delay VC0 low after VC1 or VC2 active
t4
D[7:0] setup until VC1 active
t5
D[7:0] hold after VC1 inactive
t6
VC0 inactive pulse width
t7
VC1 inactive until any command active
t8
(Read cycle) VC1 low until D[7:0] non 3-state
t9
(Read cycle) D[7:0] setup until VC0 inactive
t10 (Read cycle) D[7:0] hold after VC1 inactive
t11 Hold VC1 active after VC0 active
TEST CONDITIONS
MIN TYP MAX UNIT
10
ns
10
ns
28 ns
5
ns
10
ns
10
ns
80
ns
5
ns
0
ns
0
15 ns
0
ns
3–6