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TLC876M_07 Datasheet, PDF (8/22 Pages) Texas Instruments – 10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
operating characteristics at AVDD = DVDD = 5 V, DRVDD = 3.3 V, VI(REFT) = 3.6 V, VI(REFB) = 1.6 V,
fCLK = 20 MSPS (unless otherwise noted)
timing requirements
fconv
td(o)
PARAMETER
Maximum conversion rate (see Note 2)
Delay time, output
TEST CONDITIONS MIN
20
CL = 20 pF
5
td(pipe) Delay time, pipeline, latency
td(A)
Delay time, aperture
Aperture jitter
tdis(DD) Disable time, OE↑ to Hi-Z
ten(HL) Enable time, OE↓ to valid data
CL = 20 pF
NOTE 2: The conversion rate can be a minimum of 10 kHz without degradation in specified performance.
TYP MAX UNIT
MHz
20
ns
3.5
Clock
cycles
4
ns
22
ps
5
15 ns
5
15 ns
PARAMETER MEASUREMENT INFORMATION
Sample N
Sample N+1 Sample N+2
AIN
tw(CLKH)
td(A)
td(pipe)
tw(CLKL)
CLK
tc
td(o)
td(o)
D0 – D9
Data N–4
Data N–3
Data N–2
Data N–1
Data N
Figure 1. Timing Diagram
OE
tdis(DD)
ten(HL)
D0–D9
Active
High Impedance
Figure 2. Output Enable to Data Output Timing Diagram
STBY
Output Data Valid
CLK
Figure 3. Standby Timing
8
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